A Polynomial Time Optimal Algorithm for Simultaneous Buffer and Wire Sizing (1998)

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by Chris C. N. Chu , D. F. Wong
Venue:IEEE Transactions on Comput. Aided Des. Integrated Circuits Syst
Citations:3 - 0 self

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12 A new approach to simultaneous buffer insertion and wire sizing – Chris C. N. Chu, D. F. Wong - 1997
35 Closed form solution to simultaneous buffer insertion/sizing and wire sizing – Chris C. N. Chu, D. F. Wong - 1997
7 Theory and Algorithm of Local-Refinement Based Optimization with Application to Device and Interconnect Sizing – Jason Cong, Lei He - 1999
7 An Efficient Technique for Device and Interconnect Optimization in Deep Submicron Designs – Jason Cong, Lei He - 1997
36 GLOBAL INTERCONNECT SIZING AND SPACING WITH CONSIDERATION OF COUPLING CAPACITANCE – Jason Cong, et al. - 1997
58 An Interconnect-Centric Design Flow for Nanometer Technologies – Jason Cong - 1999
69 Fast and Exact Simultaneous Gate and Wire Sizing by Lagrangian Relaxation – Chung-ping Chen, Chris C. N. Chu, D. F. Wong - 1997
4 Modeling and Optimization of VLSI Interconnects – Lei He - 1999
1 Modeling and Layout Optimization of VLSI Devices and Interconnects in Deep Submicron Design – Jason Cong - 1997
7 Theory and Algorithm of Local-Refinement-Based Optimization with Application to Device and Interconnect Sizing – Jason Cong, Lei He - 1999
51 Buffered Steiner Tree Construction with Wire Sizing for Interconnect Layout Optimization – Takumi Okamoto , Jason Cong - 1996
8 Interconnect Performance Estimation Models for Synthesis and Design Planning – Jason Cong , Zhigang Pan
5 Wire Width Planning for Interconnect Performance Optimization – Jason Cong, Zhigang (David) Pan - 2002
21 Interconnect Performance Estimation Models for Design Planning – Jason Cong, Zhigang (David) Pan - 2001
23 Interconnect Layout Optimization under Higher-Order RLC Model for MCM Designs – Jason Cong, Cheng-Kok Koh, Patrick H. Madden - 1997
59 Interconnect design for deep submicron ICs – Jason Cong, Zhigang Pan, Lei He, Cheng-Kok Koh, Kei-Yong Khoo - 1997
12 Performance Driven Global Routing for Standard Cell Design – Jason Cong, Patrick H. Madden - 1997
8 Maze Routing with Buffer Insertion and Wiresizing – Minghorng Lai , D. F. Wong - 2000
1 Wire Sizing with Scattering Effect for Nanoscale Interconnection – Sean X. Shi, David Z. Pan