|
95
|
Automatic Application-Specific Instruction-Set Extensions Under Microarchitectural Constraints
– Kubilay Atasu, et al.
- 2003
|
|
171
|
A High-Performance Microarchitecture with Hardware-Programmable Functional Units
– Rahul Razdan, Michael D. Smith
- 1994
|
|
32
|
Instruction Generation and Regularity Extraction for Reconfigurable Processors
– Philip Brisk, Adam Kaplan, Ryan Kastner, Majid Sarrafzadeh
- 2002
|
|
70
|
Processor acceleration through automated instruction set customization
– Nathan Clark, Hongtao Zhong, Scott Mahlke
- 2003
|
|
44
|
Instruction set definition and instruction selection for ASIPs
– J Van Praet, G Goossens, D Lanneer, H De Man
- 1994
|
|
23
|
Synthesis of application specific instruction sets
– Ing-jer Huang
- 1995
|
|
44
|
Scalable Custom Instructions Identification for Instruction-Set Extensible Processors
– Pan Yu
- 2004
|
|
30
|
HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform
– Massimo Baleani, Frank Gennari, Yunjian Jiang, Yatish Patel, Robert K. Brayton, Alberto Sangiovanni-vincentelli
- 2002
|
|
26
|
Synthesis of application specific instructions for embedded DSP software
– Hoon Choi, In-cheol Park, Seung Ho Hwang, Chong-min Kyung
- 1999
|
|
48
|
Designing domainspecific processors
– Marnix Arnold, Henk Corporaal
- 2001
|
|
7
|
A Methodology for Automated Design of Computer Instruction Sets
– Jeremy Peter Bennett, Jeremy Peter Bennett
- 1988
|
|
748
|
MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communications Systems
– Chunho Lee, Miodrag Potkonjak, William H. Mangione-smith
|
|
34
|
Automatic generation of application specific processors
– D Goodwin, D Petkov
- 2003
|
|
76
|
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
– Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithviraj Banerjee
- 2000
|
|
53
|
Instruction Generation for Hybrid Reconfigurable Systems
– R. Kastner, A. Kaplan, S. Ogrenci Memik, E. Bozorgzadeh
- 2001
|
|
14
|
Synthesis of instruction sets for pipelined microprocessors
– I-J Huang, A M Despain
- 1994
|
|
95
|
Can Logic Programming Execute as Fast as Imperative Programming? [References]
– Peter Lodewijk Van Roy, E. Tick, D. H. D. Warren, Towards Pipelined, Prolog Processor, Symposium On Logic
- 1990
|
|
3637
|
D.A.Patterson, “Computer Architecture: A quantitative Approach”, Fourth edition
– J L Hennessy
- 2007
|
|
42
|
Application-specific instruction generation for configurable processor architectures
– Jason Cong, Yiping Fan, Guoling Han, Zhiru Zhang
- 2004
|