Monitoring Power Dissipation for Fault Detection (1996)

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by Bapiraju Vinnakota
Venue:14th VTS
Citations:18 - 2 self

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BY MULTIPLE PARAMETER CORRELATION – Sagar Suresh Sabade, Duncan Walker, Vivek Sarin, Donald Friesen, Henry Taylor - 2003
7 IC Test Using the Energy Consumption Ratio – Wanli Jiang, Bapiraju Vinnakota - 1999
7 I_DDX-Based Test methods: A Survey – Sagar S. Sabade, Duncan M. Walker - 2004
Feasibility Study on the Costs of IDDQ testing in CMOS Circuits – Joel Ferguson, Tracy Larrabee
66 Optimal design of a CMOS op-amp via geometric programming – Maria Del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee - 2001
60 Static Compaction Techniques to Control Scan Vector Power Dissipation – Ranganathan Sankaralingam , Rama Rao Oruganti, Nur A. Touba - 2000
37 IDDQ Testing for CMOS VLSI – Rochit Rajsuman - 2000
31 A CMOS Area Image Sensor With Pixel Level A/D Conversion – Boyd Fowler, Abbas El Gamal, David X. D. Yang - 1995
21 Reducing Power Dissipation During Test Using Scan Chain Disable – Ranganathan Sankaralingam, Bahram Pouya, Nur A. Touba - 2001