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3
|
Managing Leakage Energy in Cache Hierarchies
– Lin Li, Ismail Kadayif, Yuh-fang Tsai, N. Vijaykrishnan, Mahmut Kandemir, Mary Jane Irwin, Anand Sivasubramaniam
- 2003
|
|
3
|
PennBench: A Benchmark Suite for Embedded Java
– G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin
- 2005
|
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9
|
Leakage Energy Management in Cache Hierarchies
– L. Li, I. Kadayif, Y-f. Tsai, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, A. Sivasubramaniam
- 2002
|
|
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A Precisely Tunable Drowsy Cache Management Mechanism
– Major Bhadauria, Sally A. Mckee, Karan Singh, Gary Tyson
|
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17
|
Compiler-Directed Instruction Cache Leakage Optimization
– W. Zhang, J. S. Hu, V. Degalahal, N. Vijaykrishnan, M. J. Irwin
- 2002
|
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31
|
Static Energy Reduction Techniques for Microprocessor Caches
– Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger
- 2001
|
|
19
|
Comparison of State-Preserving vs. Non-State-Preserving Leakage Control in Caches
– Dharmesh Parikh, Yan Zhang, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
- 2003
|
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88
|
HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects
– Yan Zhang, Dharmesh Parikh, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
- 2003
|
|
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Profile-Based Adaption . . .
– Karthik Sankaranarayanan, Kevin Skadron
- 2004
|
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6
|
Energy Savings Through Compression in Embedded Java Environments
– G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, W. Wolf
- 2002
|
|
2
|
Low Static-Power Frequent-Value Data Caches
– Chuanjun Zhang, Jun Yang, Frank Vahid
- 2004
|
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15
|
Power reduction techniques for microprocessor systems
– Vasanth Venkatachalam, Michael Franz
- 2005
|
|
2
|
Banked scratch-pad memory management for reducing leakage energy consumption
– M. J. Irwin, G. Chen
- 2004
|
|
1
|
Reducing leakage in power-saving capable caches for embedded systems by using a filter cache
– Roberto Giorgi, Paolo Bennati
- 2007
|
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1
|
Predictive Precharging for Bitline Leakage Energy Reduction
– Soontae Kim, N. Vijaykrishnan, M. Kandemir, M. J. Irwin
- 2002
|
|
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for 2-D and 3-D ICs
– Multiobjective Microarchitectural Floorplanning, Gabriel H. Loh
|
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12
|
System Level Leakage Reduction Considering the Interdependence of Temperature and Leakage
– Lei He, Weiping Liao, Mircea R. Stan
- 2004
|
|
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The Timekeeping Methodology: Exploiting Generational Lifetime Behavior To Improve Processor Power And Performance
– Zhigang Hu
|
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3
|
Asymmetric-Cell Caches: Exploiting Bit Value Biases to Reduce Leakage Power in Deep-Submicron, High-Performance Caches
– Navid Azizi, Andreas Moshovos, Farid N. Najm, Babak Falsafi, Carnegie Mellon Univeristy
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