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11
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Feasibility and Performance Region Modeling of Analog and Digital Circuits
– Ramesh Harjani, Jianfeng Shao
- 1996
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2
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Feasibility Region Modeling of Analog Circuits for Hierarchical Circuit Design
– Jianfeng Shao, Ramesh Harjani
- 1994
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CIP-DATA LIBRARY TECHNISCHE UNIVERSITEIT EINDHOVEN
– Srinath Robin Naidu
|
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Design of Folded Cascode OTA in Different Regions of Operation through gm/ID Methodology
– H. Daoud Dammak, S. Bensalem, S. Zouari, M. Loulou
|
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36
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Optimal design of a CMOS op-amp via geometric programming
– Maria Del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee
- 2001
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4
|
The Definition of a VHDL-AMS Subset for Behavioral Synthesis of Analog Systems
– Alex Doboli, Ranga Vemuri
- 1998
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19
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Remembrance of Circuits Past : Macromodeling by Data Mining in Large Analog Design Spaces
– Hongzhou Liu, Amit Singhee, Rob A. Rutenbar, L. Richard Carley
- 2002
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14
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Sampling Strategies for Computer Experiments: Design and Analysis
– Timothy W. Simpson, Dennis K. J. Lin, Wei Chen
- 2001
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4
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Circuit Optimization via Adjoint Lagrangians
– Andrew R. Conn, Ruud A. Haring, Chandu Visweswariah, Chai Wah Wu
- 1997
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14
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Wire Sizing as a Convex Optimization Problem: Exploring the Area-Delay Tradeoff
– Sachin S. Sapatnekar
- 1996
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17
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Uncertainty-Aware Circuit Optimization
– Xiaoliang Bai, Chandu Visweswariah, Philip N. Strenski, David J. Hathaway
- 2002
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7
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Behavioral Synthesis of Analog Systems using Two-Layered Design Space Exploration
– Alex Doboli, Adrian Nunez-Aldana, Nagu Dhanwada, Sree Ganesan, Ranga Vemuri
- 1999
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4
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An Efficient DC Root Solving Algorithm with Guaranteed Convergence for Analog Integrated CMOS Circuits
– Francky Leyn, Georges Gielen, Willy Sansen
- 1998
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2
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Adaptive Sampling and Modeling of Analog Circuit Performance Parameters
– Glenn Wolfe
- 2003
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Design of Mixed-Signal Systems on Chip
– Ken Kundert, Henry Chang, Dan Jefferies, Gilles Lamant, Enrico Malavasi, Fred Sendig
- 2000
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3
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Physical Design for Surface-Micromachined MEMS
– Gary K. Fedder, Tamal Mukherjee
- 1996
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unknown title
– Charles E. Stroud
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Knowledge-Aware Synthesis Using Hierarchical Graph-Based Sizing and Biasing
– Ramy Isk, Dimitri Galayko, Marie-minerve LouĂ«rat, UniversitĂ© Pierre, Marie Curie
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SRFCC: Synthesis of RF CMOS Circuits
– Subramaniam Kaitharam, Rasekar Rajagopal, Adrian Nunez-aldana
|