Efficient Simulation of Multiple Cache Configurations using Binomial Trees (1991)

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by Rabin A. Sugumar , Santosh G. Abraham
Citations:16 - 1 self

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140 Trace-Driven Memory Simulation: A Survey – Richard A. Uhlig, Trevor N. Mudge - 2004
80 A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches – Kessler Mark Hill, R. E. Kessler, Mark D. Hill, David A. Wood - 1994
13 Techniques for Cache and Memory Simulation Using Address Reference Traces – Mark A. Holliday - 1990
24 Trap-driven Memory Simulation – Richard Albert Uhlig - 1995
81 Efficient Simulation of Caches under Optimal Replacement with Applications to Miss Characterization – Rabin A. Sugumar, Santosh G. Abraham - 1993
13 Fast instruction cache performance evaluation using compile-time analysis – David B. Whalley - 1992
27 Systematic Computer Architecture Prototyping – Thomas Martin Conte - 1992
6 Design space exploration of caches using compressed traces – Xianfeng Li, Tulika Mitra, Hemendra Singh Negi, Abhik Roychoudhury - 2004
1 Compile-Time Compaction Of Traces For Memory Simulation – Vesa Hirvisalo, Vesa Hirvisalo, Dr. Tech Esko Nuutila - 1998
3 Cache Inclusion And Processor Sampling In Multiprocessor Simulations – Submited To Sigmetrics, Jacqueline Chame, Jacqueline Chame, Michel Dubois, Michel Dubois - 1992
3 Tools and Techniques for Memory System Design and Analysis – Alvin R. Lebeck - 1995
6 Techniques for Fast Instruction Cache Performance Evaluation – David B. Whalley - 1993
Cache Performance of the SPEC92 Benchmark Suite – Jeffrey Gee Sun, Mark D. Hill, Dionisios N. Pnevmatikatos, Alan Jay Smith - 1993
4 Reduction of Cache Interference Misses through Selective Bit-permutation Mapping – Santosh Abraham, Henky Agusleo - 1994
29 Combining Trace Sampling with Single Pass Methods for Efficient Cache Simulation – Thomas M. Conte, Mary Ann Hirsch, Wen-Mei W. Hwu, Thomas M. Conte Member, Mary Ann, Hirsch Student, Wen-mei W. Hwu Member, Single Pass Algorithms - 1997
63 Instruction Fetching: Coping with Code Bloat – Richard Uhlig - 1995
Techniques Utilizing Memory Reference Characteristics for Improved Performance – Wayne A. Wong, Wayne A. Wong, Jean-loup Baer, Jean-loup Baer, Carl Ebeling, Richard Ladner, Wayne Anthony Wong - 2002
2 Hardware And Software Mechanisms For Reducing Load Latency – Todd Michael Austin - 1996
7 Efficient Profile-Based Evaluation of Randomising Set Index Functions For Cache Memories – Hans Vandierendonck, Koen De Bosschere - 2001