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134
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Trace-Driven Memory Simulation: A Survey
– Richard A. Uhlig, Trevor N. Mudge
- 2004
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74
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A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches
– Kessler Mark Hill, R. E. Kessler, Mark D. Hill, David A. Wood
- 1994
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13
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Techniques for Cache and Memory Simulation Using Address Reference Traces
– Mark A. Holliday
- 1990
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24
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Trap-driven Memory Simulation
– Richard Albert Uhlig
- 1995
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73
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Efficient Simulation of Caches under Optimal Replacement with Applications to Miss Characterization
– Rabin A. Sugumar, Santosh G. Abraham
- 1993
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11
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Fast instruction cache performance evaluation using compile-time analysis
– David B. Whalley
- 1992
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26
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Systematic Computer Architecture Prototyping
– Thomas Martin Conte
- 1992
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4
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Design space exploration of caches using compressed traces
– Xianfeng Li, Tulika Mitra, Hemendra Singh Negi, Abhik Roychoudhury
- 2004
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1
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Compile-Time Compaction Of Traces For Memory Simulation
– Vesa Hirvisalo, Vesa Hirvisalo, Dr. Tech Esko Nuutila
- 1998
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2
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Cache Inclusion And Processor Sampling In Multiprocessor Simulations
– Submited To Sigmetrics, Jacqueline Chame, Jacqueline Chame, Michel Dubois, Michel Dubois
- 1992
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3
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Tools and Techniques for Memory System Design and Analysis
– Alvin R. Lebeck
- 1995
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6
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Techniques for Fast Instruction Cache Performance Evaluation
– David B. Whalley
- 1993
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Cache Performance of the SPEC92 Benchmark Suite
– Jeffrey Gee Sun, Mark D. Hill, Dionisios N. Pnevmatikatos, Alan Jay Smith
- 1993
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4
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Reduction of Cache Interference Misses through Selective Bit-permutation Mapping
– Santosh Abraham, Henky Agusleo
- 1994
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27
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Combining Trace Sampling with Single Pass Methods for Efficient Cache Simulation
– Thomas M. Conte, Mary Ann Hirsch, Wen-Mei W. Hwu, Thomas M. Conte Member, Mary Ann, Hirsch Student, Wen-mei W. Hwu Member, Single Pass Algorithms
- 1997
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62
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Instruction Fetching: Coping with Code Bloat
– Richard Uhlig
- 1995
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7
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Efficient Profile-Based Evaluation of Randomising Set Index Functions For Cache Memories
– Hans Vandierendonck, Koen De Bosschere
- 2001
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|
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Techniques Utilizing Memory Reference Characteristics for Improved Performance
– Wayne A. Wong, Wayne A. Wong, Jean-loup Baer, Jean-loup Baer, Carl Ebeling, Richard Ladner, Wayne Anthony Wong
- 2002
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2
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Hardware And Software Mechanisms For Reducing Load Latency
– Todd Michael Austin
- 1996
|
