A 1.5-V, 10-bit, 14.3-MS/s CMOS Pipeline Analog-to-Digital Converter


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by Andrew Abo And , Abstract—a -v , Ms/s Pipeline Analog-to-digital

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5 A 0.9V 12mW 5MSPS algorithmic ADC with 77dB SFDR – Jipeng Li, Gil-cho Ahn, Student Member, Dong-young Chang, Un-ku Moon, Senior Member - 2005
Wideband High-Performance Sigma-Delta Modulators for High-Speed Communications – Yi Yin - 2006
3 Sub-1-v design techniques for highlinearity multistage/pipelined analog-to-digital converters – Dong-young Chang, Gil-cho Ahn, Student Member, Un-ku Moon, Senior Member - 2005
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13 A cascaded sigma-delta pipeline A/D converter with 1.25 MHz signal bandwidth and 89 dB SNR – Todd L. Brooks, David H. Robertson, Daniel F. Kelly, Anthony Del Muro, Stephen W. Harston - 1997
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10 A 13-bit, 1.4-MS/s Sigma-Delta Modulator for RF Baseband Channel Applications – Arnold R. Feldman, Bernhard E. Boser, Paul R. Gray - 1998
Determining and Quantifying Interconnect Parameters – Introducing Circuit Models
2 The stochastic I-pot: A circuit block for programming bias currents – Rafael Serrano-gotarredona, Luis Camuñas-mesa, Teresa Serrano-gotarredona, Juan A. Leñero-bardallo, Bernabé Linares-barranco - 2007
Representative of Graduate Studies – Gladys O. Ducoudray, Phd Date, Rogelio Palomera, Phd Date, Eduardo Juan, Phd Date, Dorothy Bollman, Phd Date, Isidoro Couvertier, Phd Date - 2005
9 An Audio ADC Delta-Sigma Modulator with 100-dB Peak SINAD and 102-dB DR Using a Second-Order Mismatch-Shaping DAC – Eric Fogleman, Jared Welz, Student Member, Ian Galton - 2001
8 Simplified Logic for First-Order and Second-Order Mismatch-Shaping Digital-to-Analog Converters – Jared Welz, Ian Galton, Eric Fogleman - 2001
Design Techniques for Low-Voltage and Low-Power Analog-to-Digital Converters – Un-ku Moon, Gil Cho Ahn - 2005