Retargetable Generation of Code Selectors from HDL Processor Models (1997)

by Rainer Leupers , Peter Marwedel
Venue:In European Design and Test Conference
Citations:36 - 4 self

Active Bibliography

42 Retargetable code generation based on structural processor descriptions. Design Automation for Embedded Systems – Rainer Leupers, Peter Marwedel - 1998
7 HDL-based Modeling of Embedded Processor Behavior for Retargetable Compilation – Rainer Leupers - 1998
38 Time-constrained Code Compaction for DSPs – Rainer Leupers, Peter Marwedel - 1995
22 Software Synthesis and Code Generation for Signal Processing Systems – Shuvra S. Bhattacharyya, Rainer Leupers, Peter Marwedel - 1999
ABSTRACT Software Synthesis and Code Generation for Signal Processing Systems £ – Shuvra S. Bhattacharyya, Rainer Leupers, Peter Marwedel
Time-Constrained Code Compaction for DSPs – unknown authors
Time-Constrained Code Compaction for DSPs – unknown authors
19 Instruction Selection for Embedded DSPs with Complex Instructions – Rainer Leupers, Peter Marwedel - 1996
12 Code Generation for Embedded Processors – Rainer Leupers - 2000