An 8-Bit 150-MHz CMOS A/D Converter (1999)

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by Yun-ti Wang
Citations:13 - 1 self

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Chapter 2 Power Dissipation of Analog-to-Digital Converters – unknown authors
Wideband High-Performance Sigma-Delta Modulators for High-Speed Communications – Yi Yin - 2006
Efficient Calibration of Time-Interleaved ADCs via Separable Nonlinear Least Squares – Jiadong Xu, et al.
Errors for a 400-Msamples/s 80-dB SFDR Time-Interleaved Analog-to-Digital Converter – Munkyo Seo, Mark J. W. Rodwell, Upamanyu Madhow, Senior Member
18 Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter – Shafiq M. Jamal, Daihong Fu, Mahendra P. Singh, Paul J. Hurst, Stephen H. Lewis - 2004
1 low-power, low-voltage pipelined analogto-digital converter – George Chien, High Speed, Low Power, Low Voltage - 1996
6 Bandwidth mismatch and its correction in time-interleaved analog-to-digital converters – Tsung-heng Tsai, Paul J. Hurst, Stephen H. Lewis - 2006
CMOS Sample/Hold Circuits – Kok Chin Chang, High Speed, Kok Chin Chang - 1991
1 A high-speed fully differential current switch – Louis Luh, John Choma - 2000
21 A 1.8-V digital-audio sigma-delta modulator in 0.8-µm CMOS – Shahriar Rabii, Shahriar Rabii, Bruce A. Wooley, Shahriar Rabii, Shahriar Rabii, Bruce A. Wooley - 1997
A 200-MHz 15-mW BiCMOS Sample-and-Hold Amplifier with 3 V Supply – Behzad Razavi Member
Chip-to-Chip Interface – Robert Drost, Bidirectional Single-ended, High Speed, Robert Drost - 2002
13 A cascaded sigma-delta pipeline A/D converter with 1.25 MHz signal bandwidth and 89 dB SNR – Todd L. Brooks, David H. Robertson, Daniel F. Kelly, Anthony Del Muro, Stephen W. Harston - 1997
WITH A COMBINED CHOPPING AND AVERAGING TECHNIQUE FOR REDUCED DISTORTION IN 0.18µm CMOS – Costas Georghiades, Alexander Parlos, Chanan Singh - 2005
permission. Power Efficient System and A/D Converter Design for Ultra-Wideband Radio – Shuo-wei Chen, Shuo-wei Michael Chen, Shuo-wei Michael Chen, Shuo-wei Michael Chen
5 A 12-bit 80-MSample/s pipelined ADC with bootstrapped digital calibration – Carl R. Grace, Paul J. Hurst, Stephen H. Lewis - 2005
27 Explicit analysis of channel mismatch effects in time-interleaved ADC systems – Naoki Kurosawa, Haruo Kobayashi, Kaoru Maruyama, Hidetake Sugawara, Kensuke Kobayashi - 2001
A Low-Power 170-MHz Discrete-Time Analog FIR Filter – Xiaodong Wang Student, Xiaodong Wang, Student Member, Richard R. Spencer, Senior Member - 1998
INVESTIGATION OF HYBRID FILTER Bank Based Analog-to-digital Conversion – Rajesh Inti - 2007