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Chapter 2 Power Dissipation of Analog-to-Digital Converters
– unknown authors
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Wideband High-Performance Sigma-Delta Modulators for High-Speed Communications
– Yi Yin
- 2006
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Efficient Calibration of Time-Interleaved ADCs via Separable Nonlinear Least Squares
– Jiadong Xu, et al.
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Doctoral Thesis Modeling, Identification, and Compensation of Channel Mismatch Errors in Time-Interleaved Analog-to-Digital Converters
– Christian Vogel
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12
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Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter
– Shafiq M. Jamal, Daihong Fu, Mahendra P. Singh, Paul J. Hurst, Stephen H. Lewis
- 2004
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1
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low-power, low-voltage pipelined analogto-digital converter
– George Chien, High Speed, Low Power, Low Voltage
- 1996
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5
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Bandwidth mismatch and its correction in time-interleaved analog-to-digital converters
– Tsung-heng Tsai, Paul J. Hurst, Stephen H. Lewis
- 2006
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CMOS Sample/Hold Circuits
– Kok Chin Chang, High Speed, Kok Chin Chang
- 1991
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1
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A high-speed fully differential current switch
– Louis Luh, John Choma
- 2000
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17
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A 1.8-V digital-audio sigma-delta modulator in 0.8-µm CMOS
– Shahriar Rabii, Shahriar Rabii, Bruce A. Wooley, Shahriar Rabii, Shahriar Rabii, Bruce A. Wooley
- 1997
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Chip-to-Chip Interface
– Robert Drost, Bidirectional Single-ended, High Speed, Robert Drost
- 2002
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A 200-MHz 15-mW BiCMOS Sample-and-Hold Amplifier with 3 V Supply
– Behzad Razavi Member
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WITH A COMBINED CHOPPING AND AVERAGING TECHNIQUE FOR REDUCED DISTORTION IN 0.18µm CMOS
– Costas Georghiades, Alexander Parlos, Chanan Singh
- 2005
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13
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A cascaded sigma-delta pipeline A/D converter with 1.25 MHz signal bandwidth and 89 dB SNR
– Todd L. Brooks, David H. Robertson, Daniel F. Kelly, Anthony Del Muro, Stephen W. Harston
- 1997
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3
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A 12-bit 80-MSample/s pipelined ADC with bootstrapped digital calibration
– Carl R. Grace, Paul J. Hurst, Stephen H. Lewis
- 2005
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A Low-Power 170-MHz Discrete-Time Analog FIR Filter
– Xiaodong Wang Student, Xiaodong Wang, Student Member, Richard R. Spencer, Senior Member
- 1998
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22
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Explicit analysis of channel mismatch effects in time-interleaved ADC systems
– Naoki Kurosawa, Haruo Kobayashi, Kaoru Maruyama, Hidetake Sugawara, Kensuke Kobayashi
- 2001
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Front-End Architectures for CMOS Radio Receivers
– Jan H. Mikkelsen
- 1003
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2
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B A and Miller D A B, “A 40-GHz-Bandwidth, 4bit, Time-Interleaved A/D Converter Using Photoconductive Sampling
– Lalitkumar Y. Nathawad, Ryohei Urata, Student Member, Student Member, Bruce A. Wooley, David A. B. Miller
- 2003
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