Optimal Wire and Transistor Sizing for Circuits with Non-Tree Topology (1997)

by Lieven Vandenberghe , Stephen Boyd , Abbas El Gamal
Venue:in Proc. Int. Conf. on Computer Aided Design
Citations:29 - 11 self

Documents Related by Co-Citation

11502 Computers and Intractability, A Guide to the Theory of NPCompleteness – M R Garey, D S Johnson - 1979
1885 Compressed sensing – David L. Donoho
4084 Convex Optimization – S Boyd, L Vandenberghe - 2004
2066 Regression Shrinkage and Selection Via the Lasso – Robert Tibshirani - 1994
51 Portfolio Optimization with Linear and Fixed Transaction Costs – M Lobo, M Fazel, S Boyd - 2007
505 Interior-point Methods – Florian A. Potra, Stephen J. Wright - 2000
1416 Robust Uncertainty Principles: Exact Signal Reconstruction From Highly Incomplete Frequency Information – Emmanuel J. Cand├Ęs, Justin Romberg, Terence Tao - 2006
187 TILOS: A posynomial programming approach to transistor sizing – J P Fishburn, A E Dunlop - 1985
15 Optimizing dominant time constant in RC circuits – Lieven Vandenberghe, Stephen Boyd, Abbas El Gamal - 1996