Protocol Verification as a Hardware Design Aid (1992)

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by David L. Dill , Andreas J. Drexler , Alan J. Hu , C. Han Yang
Venue:IN IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS
Citations:241 - 27 self

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Protocol Verification as a Hardware Design Aid \Lambda – David L. Dill, Andreas J. Drexler, Alan J. Hu, C. Han Yang
2675 Compositional Model Checking – E. M. Clarke, D. E. Long, K. L. Mcmillan - 1999
196 Better Verification Through Symmetry – C. Norris Ip , David L. Dill - 1996
859 The Temporal Logic of Actions – Leslie Lamport - 1993
1246 Automatic verification of finite-state concurrent systems using temporal logic specifications – E. M. Clarke, E. A. Emerson, A. P. Sistla - 1986
1177 Temporal and modal logic – E. Allen Emerson - 1995
663 Counterexample-guided Abstraction Refinement – Edmund Clarke, Orna Grumberg, Somesh Jha, Yuan Lu, Helmut Veith - 2000
648 Symbolic Model Checking: 10^20 States and Beyond – J. R. Burch, E. M. Clarke, K. L. McMillan, D. L. Dill, L. J. Hwang - 1992
715 A classification and comparison framework for software architecture description languages – Nenad Medvidovic, Richard N. Taylor - 2000