|
1
|
A co-designed virtual machine for instruction level distributed processing
– Ho-seop Kim
|
|
1
|
SPSS-X Trends
– Vmware Inc, Tal Garfinkel, Technology
- 1988
|
|
|
COVER FEATURE Dynamic and Transparent Binary Translation
– Erik R, Ibm T. J. Watson, Paul Ledak
|
|
5
|
DSP Processor/Compiler Co-Design: A Quantitative Approach
– Vojin Zivojnovic, Stefan Pees, Christian Schläger, Markus Willems, Rainer Schoenen, Heinrich Meyr
- 1996
|
|
66
|
FX!32 - A Profile-Directed Binary Translator
– Anton Chernoff, Mark Herdeg, Ray Hookway, Chris Reeve, Norman Rubin, Tony Tye, S. Bharadwaj Yadavalli, John Yates
- 1998
|
|
13
|
A Novel Methodology for the Design of Application-Specific Instruction-Set Processors (ASIPs) Using a Machine Description Language
– Andreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, Heinrich Meyr
- 2001
|
|
|
Abstract Threaded Software Dynamic Translation
– Daniel Williams
- 2005
|
|
|
Dynamic Microarchitecture Adaptation via Co-Designed Virtual Machines
– James Smith Ashutosh, James E. Smith, Ashutosh S. Dhodapkar
- 2002
|
|
|
IEEE 40 Computer
– Welcome To The, Erik R
- 1990
|
|
|
RC23262 (97775) March 27, 2000
– Computer Science Ibm, Erik R. Altman, Kemal Ebcioglu, Erik R. Altman
- 2000
|
|
1
|
ARCHITECTURAL AND COMPILER ISSUES FOR TOLERATING LATENCIES IN HORIZONTAL ARCHITECTURES
– Emre Ozer
- 2001
|
|
7
|
An approach for implementing efficient superscalar cisc processors
– Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E. Smith
- 2006
|
|
|
GUEST EDITORS ’ INTRODUCTION Welcome to the Opportunities of Binary Translation
– unknown authors
|
|
2
|
Phased Behavior and Its Impact on Program Optimization
– Sylvan Clarke, Eric Feigin, Weicon Conan Yuan, Michael D. Smith
|
|
5
|
Dynamically Trace Scheduled VLIW Architectures
– Alberto Ferreira de Souza, Peter Rounce
- 1998
|
|
7
|
Effect of Multicycle Instructions on the Integer Performance Of The . . .
– Alberto Ferreira de Souza, Peter Rounce
- 1999
|
|
1
|
SPECint95 Performance of an Implementation of the Dynamically Trace Scheduled VLIW Architecture
– Alberto Ferreira de Souza, Peter Rounce
- 1998
|
|
34
|
Instruction Path Coprocessors
– Yuan Chou, John Paul Shen
- 2000
|
|
5
|
Instruction Scheduling in the Presence of Java's Runtime Exceptions
– Matthew Arnold, Michael Hsiao, Ulrich Kremer, Barbara G. Ryder
- 1999
|
