Interconnect Estimation and Planning for Deep Submicron Designs (1998)

by Jason Cong , David Zhigang Pan
Venue:IN PROC. DESIGN AUTOMATION CONF
Citations:25 - 18 self

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25 Interconnect Delay Estimation Models for Synthesis and Design Planning – Jason Cong, et al. - 1999
67 Interconnect design for deep submicron ICs – Jason Cong, Zhigang Pan, Lei He, Cheng-Kok Koh, Kei-Yong Khoo - 1997
102 Performance optimization of VLSI interconnect layout – Jason Cong, Lei He, Cheng-kok Koh, Patrick H. Madden - 1996
67 Buffer Block Planning for Interconnect-Driven Floorplanning – Jason Cong, Tianming Kong, David Zhigang Pan - 1999
38 GLOBAL INTERCONNECT SIZING AND SPACING WITH CONSIDERATION OF COUPLING CAPACITANCE – Jason Cong, et al. - 1997
19 Analysis and Justification of a Simple, Practical 2 1/2-D Capacitance Extraction Methodology – Jason Cong, Lei He, Andrew B. Kahng, David Noice, Nagesh Shirali, Steve H.-C. Yen - 1997
7 Theory and Algorithm of Local-Refinement Based Optimization with Application to Device and Interconnect Sizing – Jason Cong, Lei He - 1999
28 Fast performance-driven optimization for buffered clock trees based on Lagrangian relaxation – C-P Chen, Y-W Chang, D F Wong - 1996
41 Optimal Wiresizing for Interconnects with Multiple Sources – Jason Cong, Lei He - 1996
53 Optimal Wiresizing Under the Distributed Elmore Delay Model – Jason Cong, Kwok-shing Leung - 1993
67 Performance-Driven Interconnect Design Based on Distributed RC Delay Model – Jason Cong, Kwok-shing Leung, Dian Zhou - 1993
6 Is wire tapering worthwhile – C J Alpert, A Devgan, S T Quay - 1999
69 An Interconnect-Centric Design Flow for Nanometer Technologies – Jason Cong - 1999
8 Optimal wire sizing function with fringing capacitance consideration – C-P Chen, D F Wong - 1997
12 Optimal shape function for a bidirectional wire under Elmore delay model – Y GAO, D F WONG - 1997
44 Optimal Wire-Sizing Formula Under the Elmore Delay Model – Chung-ping Chen, Yao-ping Chen, D. F. Wong - 1996
368 The transient response of damped linear networks with particular regard to wide-band amplifiers – W C Elmore - 1948
19 Simultaneous buffer and wire sizing for performance and power optimization – Jason Cong, Cheng-kok Koh, Kwok-shing Leung - 1996
57 Buffered Steiner Tree Construction with Wire Sizing for Interconnect Layout Optimization – Takumi Okamoto , Jason Cong - 1996