A Study of Single-Chip Processor/Cache Organizations for Large Numbers of Transistors (1994)

by Matthew Farrens , Andrew R. Pleszkun , Gary Tyson
Venue:In Proceedings of the 21st Annual International Symposium on Computer Architecture
Citations:33 - 1 self

Active Bibliography

52 Out-of-Order Vector Architectures – Roger Espasa, Mateo Valero, James E. Smith - 1997
3 Classification and Performance Evaluation of Instruction Buffering Techniques – Lizyamma Kurian, Paul T. Hulina, Lee D. Coraor, Dhamir N. Mannai - 1996
Techniques Utilizing Memory Reference Characteristics for Improved Performance – Wayne A. Wong, Wayne A. Wong, Jean-loup Baer, Jean-loup Baer, Carl Ebeling, Richard Ladner, Wayne Anthony Wong - 2002
39 Cache Replacement with Dynamic Exclusion – Scott Mcfarling - 1992
42 Software Methods for System Address Tracing: Implementation and Validation – J. Bradley Chen, David W. Wall, Anita Borg - 1994
2 Microarchitectural and Compile-Time Optimizations for Performance Improvement of Procedural and Object-Oriented Languages – Object-oriented Languages, John Kalamatianos, John Kalamatianos - 2000
Evaluation of a "Stall" Cache: An Efficient Restricted On-chip Instruction Cache – Klaus Erik, Klaus Erik Schauser, David A. Patterson, Edward H. Frank
13 Techniques for Cache and Memory Simulation Using Address Reference Traces – Mark A. Holliday - 1990
24 Trap-driven Memory Simulation – Richard Albert Uhlig - 1995
16 Efficient Simulation of Multiple Cache Configurations using Binomial Trees – Rabin A. Sugumar, Santosh G. Abraham - 1991
140 Trace-Driven Memory Simulation: A Survey – Richard A. Uhlig, Trevor N. Mudge - 2004
Hardware Techniques to Improve the . . . – Douglas Christopher Burger - 1998
54 Value Locality And Speculative Execution – Mikko Herman Lipasti - 1997
5 Specialized Caches To Improve Data Access Performance – Brian Kenworthy Bray, Michael J. Flynn, S. Simon Wong - 1993
The Latency Hiding Effectiveness of Decoupled Access/Execute Processors – Joan-Manuel Parcerisa And, Joan-manuel Parcerisa, Antonio Gonzlez - 1998
3 Multithreaded Decoupled Access/Execute Processors – Joan-Manuel Parcerisa, Antonio Gonz├ílez, Departament D'arquitectura De Computadors - 1997
1 Loop Optimization Techniques On Multi-Issue Architectures – Dan Richard Kaiser - 1994
4 Superscalar Performance in a Multithreaded Microprocessor – Bernard Karl Gunther - 1993
29 A new page table for 64-bit address spaces – Madhusudhan Talluri, Mark D. Hill, Yousef A. Khalidi - 1995