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54
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The design and implementation of a context switching FPGA
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75
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Virtual Wires: Overcoming Pin Limitations in FPGA-based Logic Emulators
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321
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Garp: A MIPS Processor with a Reconfigurable Coprocessor
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37
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PAM-Blox: High performance FPGA design for adaptive computing
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19
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Object oriented circuit-generators in Java
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- 1998
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35
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Managing pipeline-reconfigurable FPGAs
– Srihari Cadambi, Jeffrey Weener, Seth Copen Goldstein, Herman Schmit, Donald E. Thomas
- 1998
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100
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A time-multiplexed FPGA
– S Trimberger, D Carberry, A Johnson, J Wong
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74
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RaPiD - Reconfigurable Pipelined Datapath
– Carl Ebeling, Darren C. Cronquist, Paul Franklin
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42
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Improving Functional Density Through Run-Time Circuit Reconfiguration
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24
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Partitioning Sequential Circuits on Dynamically Recon gurable FPGAs
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- 1999
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13
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An Operating System for Custom Computing Machines based on the Xputer Paradigm
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5
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Run-time Parameterised Circuits for the Xilinx XC6200
– R Payne
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26
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Temporal Partitioning and Scheduling Data Flow Graphs for Recon gurable Computers," in
– K M G Purna, D Bhatia
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36
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A CAD Suite for High-Performance FPGA Design
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- 1999
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156
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Processor Reconfiguration Through Instruction Set Metamorphosis: Compiler and Architecture
– Peter Athanas, Harvey F. Silverman
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18
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Pipeline Morphing and Virtual Pipelines
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19
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Automatic Synthesis of Parallel Programs Targeted to Dynamically Recon gurable Logic Arrays
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53
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Real-Time Image Processing on a Custom Computing Platform
– P Athanas, A Abbott
- 1995
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78
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Splash 2: FPGAs in a Custom Computing Machine
– D A Buell, J M Arnold, W J Kleinfelder
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