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48
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46
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Models of Computation -- Exploring the Power of Computing
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224
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On the Complexity of VLSI Implementations and Graph Representations of Boolean Functions with Application to Integer Multiplication
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A Survey of Techniques for Formal Verification of Combinational Circuits
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793
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Galois Field Circuits and Realization of Multiple-Valued Logic Functions
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42
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Bottom-Up Induction of Oblivious Read-Once Decision Graphs
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Evolvability via modularity-induced mutational focussing
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10
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Factored Edge-Valued Binary Decision Diagrams and their Application to Matrix Representation and Manipulation
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5
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Cyclic Combinational Circuits
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4
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Distributed Binary Decision Diagrams for Verification of Large Circuits
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5
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Minimizing ROBDD Sizes of Incompletely Specified Boolean Functions by Exploiting Strong Symmetries
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8
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Representing Boolean Functions with If-Then-Else DAGs
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13
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Symbolic Verification of MOS Circuits
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107
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Algorithms for the Satisfiability (SAT) Problem: A Survey
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12
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A time domain approach for avoiding crosstalk in optical blocking multistage interconnection networks
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421
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Efficient implementation of a BDD package
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25
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The Area-Time Complexity of Binary Multiplication
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