Register File Design Considerations in Dynamically Scheduled Processors (1995)

Cached

Download Links

by Keith I. Farkas , Norman P. Jouppi , Paul Chow
Venue:In Proceedings of the Second IEEE Symposium on High-Performance Computer Architecture
Citations:41 - 1 self

Documents Related by Co-Citation

409 Complexity-Effective Superscalar Processors – Subbarao Palacharla, J. E. Smith - 1997
411 The MIPS R10000 Superscalar Microprocessor – K Yeager - 1996
94 Partitioned Register Files for VLIWs: A Preliminary Analysis of Trade-offs – A Capitanio, N Dutt, A Nicolau - 1992
242 An enhanced access and cycle time model for on-chip caches – Steven J. E. Wilton - 1994
1565 The SimpleScalar tool set, version 2.0 – Doug Burger, Todd M. Austin - 1997
29 The Performance Impact of Incomplete Bypassing in Processor Pipelines – Pritpal S. Ahuja, Douglas W. Clark, Anne Rogers - 1995
561 Combining branch predictors – S McFarling - 1993
23 A Three Dimensional Register File For Superscalar Processors – M Tremblay, B Joy, K Shin - 1995
176 A VLIW architecture for a trace scheduling compiler – Robert P. Colwell, Robert P. Nix, John J. O'donnell, David B. Papworth, Paul K. Rodman - 1987
268 Superscalar Microprocessor Design – M Johnson - 1991
21 The HP PA-8000 RISC CPU: A high performance out-of-order processor – A Kumar - 1996
157 The Multicluster Architecture: Reducing Cycle Time Through Partitioning – Keith L. Farkas, Paul Chow, Norman P. Jouppi, Zvonko Vranesic - 1997
215 CACTI 3.0: An Integrated Cache Timing, Power, and Area Model – Premkishore Shivakumar, Norman P. Jouppi, Premkishore Shivakumar - 2001
25 An investigation of the performance of various dynamic scheduling techniques – Michael Butler, Yale Patt - 1992
40 Virtual-Physical Registers – Antonio González, José González, Mateo Valero, C Jordi Girona, Mdul D - 1997
6 A 14-Port 3.8-ns 116-word 64-b Read-Renaming Register File – Creigton Asato - 1995
28 Facilitating superscalar processing via a combined static/dynamic register renaming scheme – Eric Sprangle, Yale Patt - 1994
52 Digital 21264 Sets New Standard," Microprocessor Report (October 28 – Linley Gwennap - 1996
27 Exploiting short-lived variables in superscalar processors – L Lozano C, G Gao - 1995