An Automated Analog Layout Generation Flow


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by Patrick T. McElwee

Active Bibliography

4 A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits – Mohamed Dessouky, Marie-Minerve Louërat - 2000
9 On the Exploration of the Solution Space in Analog Placement with Symmetry Constraints – Florin Balasa, Sarat C. Maruvada, Karthik Krishnamoorthy - 2004
Design of Mixed-Signal Systems on Chip – Ken Kundert, Henry Chang, Dan Jefferies, Gilles Lamant, Enrico Malavasi, Fred Sendig - 2000
8 Layout-Oriented Synthesis of High Performance Analog Circuits – Mohamed Dessouky, Marie-minerve Louërat - 2000
51 Optimal design of a CMOS op-amp via geometric programming – Maria Del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee - 2001
Automatic Topology Optimization for Analog Module Generators – Wolf And Kleine
6 MIDAS - a functional simulator for mixed digital and analog sampled data systems – Louis A. Williams, Bruce A. Wooley, Robert Mckinstry, Robert Mckinstry, Robert Mckinstry, Robinson Neff, Robinson Neff, Robinson Neff - 1995
Automatic Topology Optimization for Analog Module Generators – M. Wolf, U. Kleine
A Current-Path Based Placement Methodology for Analog IC Layout Design – Zhi-ming Lin, Mei-yuan Liao, Kuei-chen Huang
A Performance-Driven Placement Algorithm with Simultaneous PlaceRoute Optimization for Analog IC's – Juan Prieto Adoracin, Juan A. Prieto, Juan A. Prieto, Adoración Rueda, Adoración Rueda, José M. Quintana, José M. Quintana, José L. Huertas, José L. Huertas - 1997
Symmetry Within the Sequence-Pair Representation in the Context of Placement for Analog Design – Florin Basala, Koen Lampaert - 2000
A New Interactive Analog Layout Methodology based on Rubber-band Routing – Kazuhiko Kobayashi , Wayne Wei-Ming Dai - 1996
2 Optimum Stacked Layout for Analog CMOS ICs – Enrico Malavasi, Davide Pandini, Valentino Liberali - 1993
21 Automation of IC Layout with Analog Constraints – Enrico Malavasi, Edoardo Charbon, Eric Felt, Alberto Sangiovanni-Vincentelli - 1999
11 Fully programmable bias current generator with 24 bit resolution per bias – Tobi Delbrück, Patrick Lichtsteiner, Inst Of Neuroinformatics, Uni-eth Zürich - 2006
11 Transistor matching in analog CMOS applications – Marcel J. M. Pelgrom, Hans P. Tuinhout, Maarten Vertregt - 1998
11 Systematic Width-and-Length Dependent CMOS Transistor Mismatch Characterization and Simulation – Teresa Serrano-Gotarredona, Bernabe Linares-Barranco - 1999
Analog System Performance Estimation in the VASE (VHDL-AMS Synthesis Environment) – Ranga Vemuri, Adrian Nunez-Aldana, Nagu R. Dhanwada, Alex Doboli, Paul Campisi, Sree Ganesan
Two Level Performance Estimator for High Level Synthesis of Analog Integrated Circuits with Feedback – Adrián Nuñez-Aldana, Ranga Vemuri