Trace Cache: a Low Latency Approach to High Bandwidth Instruction Fetching (1996)

by Eric Rotenberg , Steve Bennett , James E. Smith , Eric Rotenberg
Venue:In Proceedings of the 29th International Symposium on Microarchitecture
Citations:264 - 11 self

Active Bibliography

Design of Trace Caches for High Bandwidth Instruction Fetching – Michael Sung, Arthur C. Smith
Scalable Hardware Mechanisms for Superscalar Processors – Steven Daniel Wallace, Daniel Wallace - 1997
2 Control Flow Speculation for Distributed Architectures – Nitya Ranganathan - 2009
9 Trace processors: Exploiting hierarchy and speculation – Eric Rotenberg - 1999
4 High-Performance Frontends for Trace Processors – Quinn Able Jacobson - 1999
76 The Microarchitecture of Superscalar Processors – James E. Smith, Gurindar S. Sohi - 1995
Critical Issues Regarding the Trace Cache Fetch Mechanism – Sanjay Jeram, Daniel Holmes Friendly, Yale N. Patt - 1997
1 The Benefit of Multiple Branch Prediction on Dynamically Scheduled Systems – David M. Koppelman - 2002
7 Characterizing and Removing Branch Mispredictions – Kevin Skadron - 1999
3 Instruction Cache Prefetching Using Multilevel Branch Prediction – Alexander V. Veidenbaum - 1997
On the Realization of Fine-Grained Multithreading in Software – Andreas Grävinghoff
6 Control Flow Speculation in . . . – Quinn Jacobson, Steve Bennett, Nikhil Sharma, James E. Smith - 1997
43 The Effect of Instruction Fetch Bandwidth on Value Prediction – Freddy Gabbay, Avi Mendelson - 1998
8 Control Flow Prediction For Dynamic ILP Processors – Dionisios Pnevmatikatos, Manoj Franklin, Gurindar S. Sohi - 1993
9 Path Prediction for High Issue-Rate Processors – Kishore N. Menezes, Sumedh W. Sathaye, Thomas M. Conte - 1997
6 Branch History Table Indexing to Prevent Pipeline Bubbles in Wide-Issue Superscalar Processors – Tse-Yu Yeh, Yale N. Patt - 1993
44 A Language for Describing Predictors and its Application to Automatic Synthesis – Joel Emer, Nikolas Gloy - 1997
Instruction History Management for High-Performance Microprocessors – Ravindra Nath Bhargava - 2003
3 Microarchitectural Innovations: Boosting Microprocessor Performance beyond Semiconductor Technology Scaling – Andreas Moshovos, Gurindar, S. Sohi - 2001