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Hierarchical Symbolic Analysis of Analog Circuits Using Two-Port Networks
– Xiaoying Wang, Lars Hedrich
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1
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A Fitting Approach to Generate Symbolic Expressions for Linear and Nonlinear Analog Circuit Performance Characteristics
– Walter Daems, Georges Gielen, Willy Sansen
- 2002
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2
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Adaptive Sampling and Modeling of Analog Circuit Performance Parameters
– Glenn Wolfe
- 2003
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1
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Efficient approximation of symbolic expressions for analog behavioral modeling and analysis
– Sheldon X. -d. Tan, C. -j. Richard Shi, Senior Member
- 2004
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7
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Behavioral Synthesis of Analog Systems using Two-Layered Design Space Exploration
– Alex Doboli, Adrian Nunez-Aldana, Nagu Dhanwada, Sree Ganesan, Ranga Vemuri
- 1999
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1
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Design Methodology for Analog VLSI Implementations of Error Control Decoders
– Jie Dai, Reid R. Harrison, Christian Schlegel, Erik Brunvand, Gil Shamir, Date Chris, J. Myers, David S. Chapman
- 2002
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1
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A Synthesis Flow Toward Fast Parasitic Closure for Radio-Frequency Integrated Circuits
– Gang Zhang, Aykut Dengi, Ronald A. Rohrer, Rob A. Rutenbar, L. Richard Carley
- 2004
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1
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Built-in Fault Diagnosis for Tunable Analog Systems Using an Ensemble Method
– Hongjoong Shin, Joonsung Park, Jacob A. Abraham
- 2006
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1
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Hurwitz Stable Model Reduction for Non-Tree Structured RLCK Circuits
– Sheldon X.-D. Tan , Junjie Yang
- 2003
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Analog Circuit Feasibility Modeling using Support Vector Machine with Efficient Kernel Functions
– D. Boolch, Member Ieee Ch, Rakant Gupta Vineet Sahula, Senior Member Ieee, Abstract—performance Macromodeling Facilitates Accelerated
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8
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A general s-domain hierarchical network reduction algorithm
– Sheldon X. -d. Tan
- 2003
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unknown title
– unknown authors
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Analog Layout Synthesis- Recent Advances in Topological Approaches
– H. Graeb, F. Balasa, R. Castro-lopez, Y. -w. Chang, F. V. Fern, P. -h. Lin, M. Strasser
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A CAD Methodology for Switched Current Analogue IP Cores 1
– Reuben Wilcock
- 2003
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1
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Analog Design for Reuse - Case Study: Very Low-voltage ΔΣ Modulator
– Mohamed Dessouky, Andreas Kaiser, Marie-Minerve Louerat, Alain Greiner
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DAC Signal Shape
– H. Aboushady, L. De Lamarre, N. Beilleau, M. M Louerat
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SRFCC: Synthesis of RF CMOS Circuits
– Subramaniam Kaitharam, Rasekar Rajagopal, Adrian Nunez-aldana
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Two Level Performance Estimator for High Level Synthesis of Analog Integrated Circuits with Feedback
– Adrián Nuñez-Aldana, Ranga Vemuri
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3
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Hierarchical Constraint Transformation using Directed Interval Search for Analog System Synthesis
– Nagu R. Dhanwada, Adrian Nunez-Aldana, Ranga Vemuri, Nagu R
- 1999
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