A heuristic for optimizing stochastic activity networks with applications to statistical digital circuit sizing (2004)

by Seung-jean Kim , Stephen P. Boyd , Sunghee Yun , Dinesh D. Patil , Mark A. Horowitz
Venue:IEEE Transactions on Circuits and Systems-I
Citations:8 - 4 self

Active Bibliography

19 Digital Circuit Optimization via Geometric Programming – Stephen P. Boyd, Seung-jean Kim, Dinesh D. Patil, Mark A. Horowitz - 2005
24 Gate Sizing Using Incremental Parameterized Statistical Timing Analysis – M. R. Guthaus, N. Venkateswaran, C. Visweswariah, V. Zolotov - 2005
3 Optimization objectives and models of variation for statistical gate sizing – Matthew R. Guthaus, Natesan Venkateswaran, Dennis Sylvester - 2005
1 A Heuristic Method for Statistical Digital Circuit Sizing – Stephen Boyd , Seung-Jean Kim , Dinesh Patil , Mark Horowitz
9 Theory and applications of Robust Optimization – Dimitris Bertsimas, David B. Brown, Constantine Caramanis - 2007
8 Joint-Design-Time and Post-Silicon Minimization of Parametric Yield Loss using Adjustable Robust Optimization – Murari Mani, Ashish K. Singh, Michael Orshansky - 2006
Robust Design of Slow-Light Tapers in Periodic Waveguides – Almir Mutapcic, Stephen Boyd, Ardavan Farjadpour, Steven G. Johnson, Yehuda Avniel - 2006
16 Disciplined convex programming – Michael Grant, Stephen Boyd, Yinyu Ye - 2006
A Geometric Characterization of the Power of Finite Adaptability in Multi-stage Stochastic and Adaptive Optimization – Dimitris Bertsimas, Vineet Goyal, Xu Andy Sun
1 A Geometric Programming-based Worst-Case Gate Sizing Method Incorporating Spatial Correlation – Jaskirat Singh, Vidyasagar Nookala, Zhi-quan Luo, Sachin S. Sapatnekar
3 An Efficient Method for Large-Scale Gate Sizing – Siddharth Joshi, Stephen Boyd
16 A New Statistical Optimization Algorithm for Gate Sizing – Murari Mani, Michael Orshansky
26 An Efficient Algorithm for Statistical Minimization of Total Power under Timing Yield Constraints – Murari Mani, Anirudh Devgan, Michael Orshansky - 2005
Robust Minimum Variance – R. G. Lorenz, S. P. Boyd
1 Nonlinear Q-Design for Convex Stochastic – Joëlle Skaf, Stephen Boyd
Novel Modeling and Optimization Techniques for Nano-Scale VLSI Designs – Sanghamitra Roy - 2008
2 Numerically convex forms and their application in gate-sizing – Sanghamitra Roy, Weijen Chen, Charlie Chung-ping Chen, Yu Hen Hu - 2007
77 An interior-point method for large-scale l1-regularized logistic regression – Kwangmoo Koh, Seung-jean Kim, Stephen Boyd, Yi Lin - 2007
Name of the Faculty Adviser Signature of the Faculty Adviser Date – Jaskirat Singh Bindra, Graduate School, Variation-aware Computer-aided Design, Kia Bazargan’s Lab, Shrirang Kar, Rupesh Shellar, Haifeng Qian, Anup Sultania, Nikhil Wale, Sagar Nookala, Salim Charaniya, Deepa Deepa, Anil Singh Bika