ISDL: An Instruction Set Description Language for Retargetability (1997)

by George Hadjiyiannis , Silvina Hanono , Srinivas Devadas
Citations:90 - 3 self

Documents Related by Co-Citation

129 EXPRESSION: A language for architecture exploration through compiler/simulator retargetability – Ashok Halambi, Peter Grun, Vijay Ganesh, Asheesh Khare - 1999
81 Describing instruction set processors using nML – A. Fauth, J. Van Praet, M. Freericks - 1995
35 LISA - Machine Description Language and Generic Machine Model for HW/SW Co-Design – Vojin Zivojnovic, Stefan Pees, Heinrich Meyr - 1996
52 LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures – Stefan Pees, Andreas Hoffmann, Vojin Zivojnovic, Heinrich Meyr - 1999
49 Instruction Selection, Resource Allocation, and Scheduling in the AVIV Retargetable Code Generator – Silvina Hanono, Srinivas Devadas - 1998
97 HPL PlayDoh Architecture Specification: Version 1.0 – V Kathail, M S Schlansker, B R Rau - 1994
46 Machine Description Formalism – Markus Freericks
19 A Methodology for Accurate Performance Evaluation in Architecture Exploration – George Hadjiyiannis, Srinivas Devadas - 1999
34 A processor description language supporting retargetable multi-pipeline DSP program development tools – C Siska - 1998
42 FlexWare: A Flexible Firmware Development Environment for Embedded Systems – P Paulin - 1995
93 Code Generation for Embedded Processors – P Marwedel, G Goossens
14 A Study on Design Support for Computer Architecture Design – H Akaboshi - 1996
8 Rowson et al. Generation of Software Tools from Processor Descriptions for Hardware/Software Codesign – M Hartoog, J A - 1997
80 Hardware/Software Co-Simulation – J A Rowson - 1996
176 A VLIW architecture for a trace scheduling compiler – Robert P. Colwell, Robert P. Nix, John J. O'donnell, David B. Papworth, Paul K. Rodman - 1987
42 The Marion system for retargetable instruction scheduling – D G Bradlee, R R Henry, S J Eggers - 1991
8 Automatic generation of DSP program development tools – A Fauth, A Knoll - 1993
38 HMDES Version 2.0 Specification – J C Gyllenhaal, W W Hwu, B R Rau - 1996
56 Retargetable Code Generation for Digital Signal Processors – R Leupers - 1997