Initial sizing of analog integrated circuits by centering within topology-given implicit specifications (2003)

by Guido Stehr , Michael Pronath , Frank Schenkel , Helmut Graeb , Kurt Antreich
Venue:IEEE ICCAD
Citations:4 - 2 self

Active Bibliography

19 Robust analog/RF circuit design with projection-based posynomial modeling – Xin Li, Padmini Gopalakrishnan, Yang Xu, Lawrence T. Pileggi - 2004
1 Deterministic Approaches to Analog Performance Space Exploration (PSE) – Daniel Mueller, Guido Stehr, Helmut Graeb, Ulf Schlichtmann
6 Performance-centering optimization for system-level analog design exploration – Xin Li, Jian Wang, Lawrence T. Pileggi, Tun-shih Chen, Wanju Chiang - 2005
2 Defining Cost Functions for Robust IC Design and Optimization – Arpad Bürmen, et al.
1 Analog Circuit Sizing using Adaptive Worst-Case Parameter Sets – R. Schwencker, F. Schenkel, M. Pronath, H. Graeb - 2002
1 Robust design and optimization of operating amplifiers – Árpád Bűrmen, Janez Puhan, Tadej Tuma - 2003
Compositional Design of Analog Systems Using Contracts – Xuening Sun, Xuening Sun, Xuening Sun, Xuening Sun
Automated Robust Design and Optimization of Integrated Circuits by Means of Penalty Functions – Fischer Verlag, Árpád Bűrmen, Drago Strle, Franc Bratkovič, Janez Puhan, Iztok Fajfar, Tadej Tuma
CIP-DATA LIBRARY TECHNISCHE UNIVERSITEIT EINDHOVEN – Srinath Robin Naidu
8 Analog performance space exploration by Fourier-Motzkin elimination with application to hierarchical sizing – Guido Stehr, Helmut Graeb, Kurt Antreich - 2004
25 The Many Facets of Linear Programming – Michael J. Todd - 2000
INVITED PAPER Hierarchical Modeling, Optimization, and Synthesis for System-Level Analog and – Rf Designs - 2006
21 Mismatch Analysis and Direct Yield Optimization by Spec-Wise Linearization and Feasibility-Guided Search – Frank Schenkel, Michael Pronath, Stephan Zizala, Robert Schwencker, Helmut Graeb, Kurt Antreich - 2001
3 Quadratic Statistical MAX Approximation for Parametric Yield Estimation of Analog/RF Integrated Circuits – Xin Li, Yaping Zhan, Lawrence T. Pileggi
6 Circuit Design Using Evolutionary Algorithms – Thomas Beielstein, Jan Dienstuhl, Christian Feist, Marc Pompl - 2002
44 Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits – J. A. G. Jess, K. Kalafala, S. R. Naidu, R. H. J. M. Otten, C. Visweswariah - 2003
in CMOS nanometer technologies – Georges G. E. Gielen
1 Feasible Region Approximation Using Convex Polytopes – Sachin S. Sapatnekar, Pravin M. Vaidya, S.M. Kang
7 Convexity-based Algorithms for Design Centering – Sachin S. Sapatnekar, Pravin M. Vaidya, Sung-mo Kang - 1993