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...ware oriented approaches normally take VHDL as a specification language and implement most tasks in hardware. Tasks that are not on the critical path may now be selected for a software implementation =-=[8, 9, 10, 11]-=-. As in all codesign proposals we only consider mappings onto a set containing one standard processor and some additional dedicated processors. The design decision is therefore restricted to hardware ...

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...al-time systems. Such constraints are contained in our constraint library. Because a complex MILP can be expected, we first apply a heuristic preprocessing, which is based on the metropolis algorithm =-=[20]-=- for computing the ASAP- (as soon as possible) and ALAP-times (as late as possible) for each task and communication. We computed 7100 clocks as an upper bound for the total execution time. 384 256 384...

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...ftware implementations depends on many factors like performance, timing constraints, hardware cost, etc. It is desirable to have a mapping approach that optimizes a function depending on such factors =-=[1]-=-. For some tasks it is obvious which task has to be implemented in hardware and which one in software. For example, a high speed packet manipulation should be implemented in hardware while recursive s...

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...e hardware/software codesign process consists of several steps that are run through iteratively until the design goals are met. First of all, the algorithm has to be specified using a formal language =-=[2, 3]-=-. In a second step the algorithm is partitioned into tasks that are possibly processed on different processors. Now, the set of available processors of the generic multiprocessor target architecture h...

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...e hardware/software codesign process consists of several steps that are run through iteratively until the design goals are met. First of all, the algorithm has to be specified using a formal language =-=[2, 3]-=-. In a second step the algorithm is partitioned into tasks that are possibly processed on different processors. Now, the set of available processors of the generic multiprocessor target architecture h...

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...le processors of the generic multiprocessor target architecture has to be defined. The time for executing a task on an ASIC can be guessed by synthesizing the task using a high level synthesis system =-=[4, 5]. For-=- each other task one has to determine the execution time for at least EURO-DAC ’96 with EURO-VHDL ’96 0-89791-848-7/96 $4.00 ©1996 IEEE one processor. The result is an annotated task-graph where ...

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...given in a programming language, like C, and the tasks are normally implemented on programmable processors. Only those tasks that do not meet real-time constraints are mapped onto hardware processors =-=[6, 7]-=-. For these applications one needs a high level synthesis system starting from C like algorithms to support the design process. Hardware oriented approaches normally take VHDL as a specification langu...

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...given in a programming language, like C, and the tasks are normally implemented on programmable processors. Only those tasks that do not meet real-time constraints are mapped onto hardware processors =-=[6, 7]-=-. For these applications one needs a high level synthesis system starting from C like algorithms to support the design process. Hardware oriented approaches normally take VHDL as a specification langu...

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...ware oriented approaches normally take VHDL as a specification language and implement most tasks in hardware. Tasks that are not on the critical path may now be selected for a software implementation =-=[8, 9, 10, 11]-=-. As in all codesign proposals we only consider mappings onto a set containing one standard processor and some additional dedicated processors. The design decision is therefore restricted to hardware ...

Citation Context

...ware oriented approaches normally take VHDL as a specification language and implement most tasks in hardware. Tasks that are not on the critical path may now be selected for a software implementation =-=[8, 9, 10, 11]-=-. As in all codesign proposals we only consider mappings onto a set containing one standard processor and some additional dedicated processors. The design decision is therefore restricted to hardware ...

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...ware oriented approaches normally take VHDL as a specification language and implement most tasks in hardware. Tasks that are not on the critical path may now be selected for a software implementation =-=[8, 9, 10, 11]-=-. As in all codesign proposals we only consider mappings onto a set containing one standard processor and some additional dedicated processors. The design decision is therefore restricted to hardware ...

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...ecification no matter what kind of implementation is intended for the different tasks. The mapping of tasks to processors under real-time conditions is a well known discipline in real time processing =-=[13]-=-. Our approach is restricted to those applications where the execution time of an algorithm is constant, that means it is also independent of specific input values. Many signal and image processing al...

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...ple computation We have described our basic model (each task is performed once on one processor) in [14, 17]. In section 3.3 we describe the MILP model that supports multiple computation of tasks. In =-=[18]-=- also a MILP is described but without multiple computation of tasks. First, we introduce notations used to formulate the MILP. Second, we explain how multiple computation can help to meet real-time co...

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...ion. Then we present statistics for four other task-graphs. 4.1. Results of a typical application Our example is a typical complex image processing application based on the CCITT recommendation H.261 =-=[19]-=-. This application consists of several tasks with execution times independent of the input values. Each of the tasks have different demands on the hardware components to be used. 4.1.1. The underlying...