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## Automated least-significant bit datapath optimization for FPGAs (2004)

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- [www.ee.washington.edu]
- [www.ee.washington.edu]
- [www.ee.washington.edu]
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### Other Repositories/Bibliography

Venue: | In IEEE Symposium on Field-Programmable Custom Computing Machines |

Citations: | 7 - 1 self |

### Citations

5155 | Optimization by simulated annealing
- Kirkpatrick, Gelatt, et al.
- 1983
(Show Context)
Citation Context ...ately, we have provided a model that can accurately determine the area and error of each node within the datapath. With these measurements and optimization “moves”, we can utilize simulated annealing =-=[11]-=- to choose how to use ourpalette of optimizations to achieve an efficient implementation area under a user-specified error constraint. We have developed an automated approach using simulated annealin... |

322 | VPR: A new packing, placement and routing tool for FPGA research. In:
- Betz, Rose
- 1997
(Show Context)
Citation Context ...timizations to achieve an efficient implementation area under a user-specified error constraint. We have developed an automated approach using simulated annealing principles similar to those found in =-=[12]-=- to area-optimize a dataflow graph. Simulated annealing has shown to produce good results on often intractable problems, and is a good candidate for our design challenge. The possible moves in our sys... |

118 | Bitwidth analysis with application to silicon compilation,” in
- Stephenson, Babb, et al.
- 2001
(Show Context)
Citation Context ...ccumulated at the least-significant end of the datapath if the value requires greater precision than thedatapath can represent, resulting in truncation or round-off error. Previous research includes =-=[2]-=-, [3], which only performs the analysis on the most-significant bit position of the datapath. While this method achieves good results, it ignores the potential optimization of the least-significant bi... |

75 | Fixed-point optimization utility for C and C++ based digital signal processing programs,” in
- Kim, Kum, et al.
- 1995
(Show Context)
Citation Context ...the most-significant bit position of the datapath. While this method achieves good results, it ignores the potential optimization of the least-significant bit position. Other research, including [4], =-=[5]-=- begin to touch on fixed-point integer representations of numbers with fractional portions. Finally, more recent research, [6], [7] begin to incorporate error analysis into the overall optimization of... |

64 |
Simulation-based word-length optimization method for fixed-point digital signal processing systems,”
- 21Sung, Kum
- 1995
(Show Context)
Citation Context ...s on the most-significant bit position of the datapath. While this method achieves good results, it ignores the potential optimization of the least-significant bit position. Other research, including =-=[4]-=-, [5] begin to touch on fixed-point integer representations of numbers with fractional portions. Finally, more recent research, [6], [7] begin to incorporate error analysis into the overall optimizati... |

46 |
Truncated multiplication with correction constant,”
- Schulte, Swartzlander
- 1993
(Show Context)
Citation Context ... at the cost of increased error in the output over an exact arithmetic multiplication. An alternative to this method of area/error tradeoff is one described in [8]. This work, and the work of others (=-=[9]-=-, [10]), focuses on removing a number of leastsignificant columns of the partial-product array. As described in [9], by removing the n least-significant columns from an array-multiplier multiplication... |

35 | The multiple wordlength paradigm,” in
- Constantinides, Cheung, et al.
- 2001
(Show Context)
Citation Context ...f the least-significant bit position. Other research, including [4], [5] begin to touch on fixed-point integer representations of numbers with fractional portions. Finally, more recent research, [6], =-=[7]-=- begin to incorporate error analysis into the overall optimization of the fractional width of the datapath elements. Most of the techniques introduced deal with either limited scope of problem, such a... |

28 | Precis: A Design-Time Precision Analysis Tool
- Chang, Hauck
(Show Context)
Citation Context ...@ee.washington.edu Abstract— In this paper we present a method for FPGA datapath precision optimization subject to user-defined area and error constraints. This work builds upon our previous research =-=[1]-=- which presented a methodology for optimizing for dynamic range—the most significant bit position. In this work, we present an automated optimization technique for the least-significant bit position o... |

21 |
Single-precision multiplier with reduced circuit complexity for signal processing applications,”
- Lim
- 1992
(Show Context)
Citation Context ...ltipliers gives a reduced area footprint at the cost of increased error in the output over an exact arithmetic multiplication. An alternative to this method of area/error tradeoff is one described in =-=[8]-=-. This work, and the work of others ([9], [10]), focuses on removing a number of leastsignificant columns of the partial-product array. As described in [9], by removing the n least-significant columns... |

18 | Bitwise: Optimizing Bitwidths Using Data-Range Propagation.” Master's thesis
- Stephenson
- 2000
(Show Context)
Citation Context ...lated at the least-significant end of the datapath if the value requires greater precision than thedatapath can represent, resulting in truncation or round-off error. Previous research includes [2], =-=[3]-=-, which only performs the analysis on the most-significant bit position of the datapath. While this method achieves good results, it ignores the potential optimization of the least-significant bit pos... |

10 |
FPGA Resource Reduction Through Truncated Multiplication
- Wires, Schulte, et al.
- 2001
(Show Context)
Citation Context ...he cost of increased error in the output over an exact arithmetic multiplication. An alternative to this method of area/error tradeoff is one described in [8]. This work, and the work of others ([9], =-=[10]-=-), focuses on removing a number of leastsignificant columns of the partial-product array. As described in [9], by removing the n least-significant columns from an array-multiplier multiplication, we s... |

7 |
et al, "Precision And Error Analysis Of MATLAB Applications During Automated Hardware Synthesis for FPGAs
- Nayak
- 2001
(Show Context)
Citation Context ...ion of the least-significant bit position. Other research, including [4], [5] begin to touch on fixed-point integer representations of numbers with fractional portions. Finally, more recent research, =-=[6]-=-, [7] begin to incorporate error analysis into the overall optimization of the fractional width of the datapath elements. Most of the techniques introduced deal with either limited scope of problem, s... |