. Static timing analyzers, which are used to analyze real-time systems, need to know the minimum and maximum number of iterations associated with each loop in a real-time program so accurate timing predictions can be obtained. This paper describes three complementary methods to support timing analysis by bounding the number of loop iterations. First, an algorithm is presented that determines the minimum and maximum number of iterations of loops with multiple exits. Even when the number of iterations cannot be exactly determined, it is desirable to know the lower and upper iteration bounds. Second, when the number of iterations is dependent on unknown values of variables, the user is asked to provide bounds for these variables. These bounds are used to determine the minimum and maximum number of iterations. Specifying the values of variables is less error prone than specifying the number of loop iterations directly. Finally, a method is given to tightly predict the execution time of in...

A method is presented for incremental development of high performance parallel programs, using an application from molecular dynamics as a case study. The method uses the technique of overhead analysis, which aims to explain experimental observations using models of execution behaviour, as a means of determining successive steps in program development. The case study illustrates how this technique can be applied to the complexities of real-world parallel computations. 1 Introduction Parallel computers have so far failed to fulfil their promise of providing cheap high performance computing. In part, this is due to the high cost of software development required to find an acceptable implementation of an application which runs efficiently on a given parallel system: this has been termed the `best' implementation problem [4]. Execution time is, in general, unpredictable and, often, decisions made early in the development process have profound effects on the ultimate performance of an ap...

Users of real-time systems are not only interested in obtaining correct computations from their programs, but timely responses as well. Responses that are given past a deadline is not acceptable. Areal-time system is often comprised of a set of tasks that are statically scheduled. Therefore, it is necessary to determine a program’s execution

This paper presents a compile-time scheme for partitioning non-rectangular loop nests which consist of inner loops whose bounds depend on the index of the outermost, parallel loop. The minimisation of load imbalance, on the basis of symbolic cost estimates, is considered the main objective; however, options which may increase other sources of overhead are avoided. Experimental results on a virtual shared memory computer are also presented. 1.

To determine safe and tight worst-case execution time (WCET) estimates of scientific and multimedia codes that spent most of the execution time on executing loop iterations, efficient and accurate loop iteration count estimation methods are required. To support dynamic scheduling decisions based on WCET estimations, an effective loop iteration count estimation method should generate parametric formulae that can be evaluated at runtime. Therefore, the loop iteration count estimation methods utilized for WCET estimation must be effective in analyzing loops with symbolic bounds, non-rectangular loops, zero-trip loops, loops with multiple critical paths, and loops with non-unit strides. In this paper we present a novel approach to parametric WCET estimation to handle loops with both affine and nonaffine loop bounds in an efficent manner using a formulation based on Newton-Gregory interpolating polynomials. 1 Introduction and Related Work Static worst-case execution of time (WCET) estimates are used in real-time system scheduling and dynamic

Static timing analyzers need to know the number of iterations associated with each loop in a real-time program so accurate timing predictions can be obtained. The number of iterations of non-rectangular loops vary due to dependencies on counter variables of outer loops. These loops have long presented a problem for timing analyzers since the resulting timing predictions are typically quite loose. This paper presents a general and efficient method for obtaining tight timing predictions of such loops. The total number of iterations executed by an inner loop inside a loop nest can be expressed in terms of summations. Equations representing such loops can be efficiently solved given that certain restrictions are met. We outline an approach for formulating the summations representing the total number of iterations of a loop, a method for solving the equation containing the summations, and a technique for integrating this method into an existing timing analyzer. 1.

This talk illustrates how parallelizing compiler technology can be used to greatly simplify and, in many cases, to fully automate the process of applying diverse modeling techniques to model a parallel application. First, we will present the key features of a program workload representation that has been designed to support both compiler synthesis as well as detailed performance prediction. Then, we will present compiler techniques that we used to derive a concise form of this workload description automatically for a given program. The focus of these techniques is HPF programs compiled to MPI using the Rice dHPF compiler | issues related to explicit message-passing codes will also be discussed.

Abstract. Parallel loops account for the greatest percentage of program parallelism. The degree to which parallelism can be exploited and the amount of overhead involved during parallel execution of a nested loop directly depend on partitioning, i.e., the way the different iterations of a parallel loop are distributed across different processors. Thus, partitioning of parallel loops is of key importance for high performance and efficient use of multiprocessor systems. Although a significant amount of work has been done in partitioning and scheduling of rectangular iteration spaces, the problem of partitioning of non-rectangular iteration spaces- e.g. triangular, trapezoidal iteration spaces- has not been given enough attention so far. In this paper, we present a geometric approach for partitioning N-dimensional non-rectangular iteration spaces for optimizing performance on parallel processor systems. Speedup measurements for kernels (loop nests) of linear algebra packages are presented. 1

The organizers would like to thank all the people who made this year's Workshop for Optimization of DPS and Embedded Systems possible: ➔ The authors who submitted a paper. We had a total of 21 submissions this year. Out of these we were able to select 9 good quality papers. ➔ The program committee as well as the external reviewers for their excellent reviews. Although we had quite a number of papers, we were still able to get at least four reviews per paper. ➔ Rodric Rabbah and Martien de Jong for accepting to give the keynote and an invited talk respectively. ➔ The CGO organizers, especially Chandra Krintz for taking care of all the logistics and for hosting the workshop. ➔ ACM for sponsoring the event.

Efficient partitioning of parallel loops plays a critical role in high performance and efficient use of multiprocessor systems. Although a significant amount of work has been done in partitioning and scheduling of loops with rectangular iteration spaces, the problem of partitioning non-rectangular iteration spaces — e.g., triangular, trapezoidal iteration spaces — with variable densities has not been addressed so far to the best of our knowledge. In this paper, we present a mathematical model for partitioning N-dimensional non-rectangular iteration spaces with variable densities. We present a unimodular loop transformation and a geometric approach for partitioning an iteration space along an axis corresponding to the outermost loop across a given number of processors to achieve near-optimal performance, i.e., to achieve nearoptimal load balance across different processors. We present a case study to illustrate the effectiveness of our approach. Categories and Subject Descriptors D.1.3 [Software]: Programming Techniques—parallel programming;