In this paper we present two protocols for asynchronous Byzantine Quorum Systems (BQS) built on top of reliable channels---one for self-verifying data and the other for any data. Our protocols tolerate Byzantine failures with fewer servers than existing solutions by eliminating nonessential work in the write protocol and by using read and write quorums of different sizes. Since engineering a reliable network layer on an unreliable network is difficult, two other possibilities must be explored. The first is to strengthen the model by allowing synchronous networks that use time-outs to identify failed links or machines. We consider running synchronous and asynchronous Byzantine Quorum protocols over synchronous networks and conclude that, surprisingly, "self-timing" asynchronous Byzantine protocols may offer significant advantages for many synchronous networks when network time-outs are long. We show how to extend an existing Byzantine Quorum protocol to eliminate its dependency on reliable networking and to handle message loss and retransmission explicitly.

Sharing data between multiple asynchronous users---each of which can atomically read and write the data---is a feature which may help to increase the amount of parallelism in distributed systems. An algorithm implementing this feature is presented. The main construction of an n-user atomic variable directly from single-writer, single-reader atomic variables uses O(n) control bits and O(n) accesses per Read/Write running in O(1) parallel time.

Shared registers are basic objects used as communication mediums in asynchronous concurrent computation. A concurrent timestamp system is a higher typed communication object, and has been shown to be a powerful tool to solve many concurrency control problems. It has turned out to be possible to construct such higher typed objects from primitive lower typed ones. The next step is to find efficient constructions. We propose a very efficient wait-free construction of bounded concurrent timestamp systems from 1-writer shared registers. This finalizes, corrects, and extends a preliminary bounded multiwriter construction proposed by the second author in 1986. That work partially initiated the current interest in wait-free concurrent objects, and introduced a notion of discrete vector clocks in distributed algorithms.

Agreement problems are central to the study of wait-free protocols for shared memory distributed systems. We examine two specific issues arising out of this study. We consider the complexity of the wait-free approximate agreement problem in an asynchronous shared memory comprised of only single-bit multi-writer multi-reader registers. For real-valued inputs of magnitude at most s and a real-valued accuracy requirement " ? 0 we show matching upper and lower bounds of \Theta(log(s=")) steps and shared registers. For inputs drawn from any fixed finite range this is significantly better than the best possible algorithm for single-writer multi-reader registers, which, for n processes, requires \Omega\Gammaire n) steps. These results are used to show a separation between the wait-free single-writer mult...

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Abstract. We present a randomized algorithm for asynchronous waitfree consensus using multi-writer multi-reader shared registers. This algorithm is based on earlier work by Chor, Israeli and Li (CIL) and is correct under the assumption that processes can perform a random choice and a write operation in one atomic step. The expected total work for our algorithm is shown to be O(N log(log N)), compared with O(N 2) for the CIL algorithm, and O(N log N) for the best known weak adversary algorithm. We also model check instances of our algorithm using the probabilistic model checking tool PRISM.

This paper proposes a general definition of self-stabilizing wait-free shared memory objects. The definition ensures that, even in the face of processor failures, every execution after a transient memory failure is linearizable except for an a priori bounded number of actions. Shared registers have been used extensively as communication medium in self-stabilizing protocols. As an application of our theory, we therefore focus on self-stabilizing implementation of such registers, thus providing a large body of previous research with a more solid foundation. In particular, we prove that one cannot construct a self-stabilizing single-reader single-writer regular bit from self-stabilizing single-reader single-writer safe bits, using only a single bit for the writer. This leads us to postulate a self-stabilizing dual-reader single-writer safe bit as the minimal hardware needed to achieve self-stabilizing wait-free interprocess communication and synchronization. Based on this hardware, adaptations of well-known wait-free implementations of regular and atomic shared registers are proven to be self-stabilizing. # 2002 Elsevier Science (USA) Key Words: shared memory; wait-free constructions; self-stabilization; fault tolerance; distributed computing.

This thesis presents a new application of analyzing Asynchronous Communication Mechanisms (ACMs) using Petri nets. This technique facilitates the testing of essential ACM operating properties: data coherence (concurrent reading and writing of data at the same location should not happen), data freshness (not reading out of date data) and data sequencing (not reading data in a new-old-new order). The technique allows for analysis under metastable conditions which cannot be avoided in an asynchronous environment, but have usually been omitted in the analysis of published ACM algorithms. The modelling techniques are described, along with the analysis methods and optimizations which allow the ACM models to be as compact as possible without omitting necessary detail. The method allows for fast automated analysis of ACMs therefore allowing design changes in the algorithms to be quickly analyzed, without the need to perform long formal proofs. The use of a common analysis method allows compari...

. We consider the complexity of the wait-free approximate agreement problem in an asynchronous shared memory comprised of only single-bit multi-writer multi-reader registers. For real-valued inputs of magnitude at most s and a real-valued accuracy requirement " ? 0 we show matching upper and lower bounds of \Theta(log(s=")) steps and shared registers. For inputs drawn from any fixed finite range this is significantly better than the best possible algorithm for single-writer multi-reader registers, which requires \Omega\Gammaqui n) steps. This implies a separation between the wait-free single-writer multi-reader and wait-free multi-writer multi-reader models of computation. 1. Introduction Approximate agreement has been studied extensively in both the message passing and shared memory models of distributed computing [1, 5, 6, 7, 8, 12]. It has found application in the important problem of clock synchronization [12] and, more recently, in algorithms for simplex agreement [2, 9, 3]. It...

In this paper we present probabilistic masking quorum systems, a technique for replicating data that can mask, with high probability, the arbitrary (Byzantine) failure of data servers from clients. This technique generalizes previous work on probabilistic quorum systems to mask Byzantine server failures in their full generality, and improves over previous masking quorum systems by offering better data availability and access efficiency. We define probabilistic masking quorum systems, demonstrate a novel access protocol for implementing replicated data with them, and prove general and tight lower bounds on the performance that they can achieve. We also present a probabilistic masking quorum construction that outperforms strict masking constructions in measures of both availability and efficiency.