An important thank you goes to one of my undergraduate professors, Ken Kennedy. He proposed the project that led to this thesis, and my desire to know the answer gave me the strength to complete this work. I would like to thank the languages group at Kubota Pacific Computers, Inc. for showing me that I could indeed be productive and that all problems in compilers did not take years to solve. My sanity is thanks to all of my friends from dancing, "O " runs, and everything else. They made it possible to return to work each day and eventually to graduate. I owe my parents a great debt for encouraging me to stay in graduate school even when I thought I would never finish. Last, but certainly not least, I would like to thank Don Ramsey for reading many drafts and listening to many dry runs. His input greatly helped the presentation of this thesis in both oral and written forms.

Many program analyses involve, or can be expressed in terms of, a graph reachability problem. We present a generic worklist-style algorithm capable of expressing and solving the graph reachability components of many such analyses. We compare our framework with the language reachability framework proposed by Thomas Reps, and show that some problems are expressible in both frameworks, and some problems can be expressed in only one of the frameworks.

Current software and hardware co-synthesis methodologies of control dominated embedded systems focus primarily on improving productivity in the complex design process. In order to improve synthesis quality, we propose a methodology that incorporates data flow and control optimizations performed on a novel implementation independent design task representation. The approach is applicable to any co-synthesis tool; we use a public domain co-design environment to report some results of our investigation. The data collected shows that performing such optimizations on an adequate representation can lead to considerable size and performance improvements in both the synthesized software and hardware. Keywords Design representation, control and data flow analysis, optimization, software and hardware co-design, co-synthesis. 1

We describe a tool, Igor, for implementing, testing, modifying, and evaluating abstract domains for analysis of Prolog programs. A highlevel specification language is used for specifying abstract domains that are compiled into Prolog and interfaced with an fixpoint engine to make up a complete analyzer. The compiler automatically generates code for basic domain operations from special domain type definitions. These definition are also used to combine and reduce domains. The special purpose language provides primitives, such as set and lattice operations, and a concise method for specifying abstract interpretation of built-in predicates. We evaluate the tool and show that the highlevel specifications are close to an order of magnitude less voluminous than the corresponding Prolog code and that the execution speed of the generated code is close to that of hand-written analyzers. Keywords: automatic generation, abstract domains, program analysis, logic programming 1 Introduction Dataf...

Current co-design methodologies of control dominated hardware software systems suffer from inefficient hardware (HW) and software (SW) synthesis of the various reactive system tasks. In order to improve synthesis quality, we propose a methodology that incorporates data flow in addition to control optimizations performed on a suitable task representation in a hardware and software co-design environment. We introduce our approach here, and report initial results of our investigation which show that performing such optimizations can lead to size and performance improvements in both the synthesized hardware and software.