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BiCMOS Circuits for Analog Viterbi Decoders
 IEEE Trans. Circuits Syst. II
, 1998
"... Analog Viterbi decoders are finding widespread use in classIV partialresponse diskdrive applications. These analog realizations are often used because they are smaller and consume less power than their digital counterparts. However, classIV signaling allows simplifications during Viterbi detecti ..."
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Cited by 14 (2 self)
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Analog Viterbi decoders are finding widespread use in classIV partialresponse diskdrive applications. These analog realizations are often used because they are smaller and consume less power than their digital counterparts. However, classIV signaling allows simplifications during Viterbi detection and thus existing analog decoders have limited applications. The purpose of this paper is to develop efficient analog circuits that can be used for general Viterbi detection. To demonstrate the feasibility of the proposed approach, the analog portions of two analog Viterbi decoders were fabricated in a 0.8m BiCMOS process. With an offchip digital path memory, operation up to 50 Mb/s is demonstrated. However, simulations indicate that with onchip digital path memory, speeds on the order of 300 Mb/s can be achieved. The power consumption of the proposed approach is estimated to be 15 mW/state drawn from a single 5V power supply. Index TermsAnalog, BiCMOS, communications, Viterbi. I...
Differential signaling with a reduced number of signal paths
 IEEE Trans. Circuits Syst. II
, 2001
"... Abstract—Differential signaling is often used for digital chiptochip interconnects because it provides commonmode noise rejection. Unfortunately, differential signals generally require 2 signal paths to communicate signals. In this paper, a method for differential signaling is described that requ ..."
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Cited by 7 (1 self)
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Abstract—Differential signaling is often used for digital chiptochip interconnects because it provides commonmode noise rejection. Unfortunately, differential signals generally require 2 signal paths to communicate signals. In this paper, a method for differential signaling is described that requires as few as C1 signal paths for signals. Using this method, the signal values appear incrementally between neighboring matched signal paths. The technique, called incremental signaling, is similar to dicode (1) partial response signaling except that the sequence is transmitted in parallel over a bus of wires rather than sequentially in time. Theoretical and simulated bit error rates are presented for several possible implementations of an encoder/transmitter and receiver/decoder for a digital data bus including peak detection and maximum likelihood sequence detection (MLSD). Peak detection uses C1 signal paths and results in a 3dB performance degradation with respect to independent noise compared with fully differential signaling. The Viterbi algorithm for MLSD uses C2 signal paths but provides only a 1.25 dB improvement over peak detection due to correlated noise on the (1)coded sequence. Modified Viterbi algorithms that use C2 signal paths are introduced to cancel the correlated noise sources, resulting in a bit error rate performance comparable with fully differential signaling. Index Terms—Chiptochip interface, differential signaling, maximum likelihood sequence detection. I.
Receiver designs for alamouti coded OFDM systems in fast fading channels
"... Abstract—In this paper, receiver designs for orthogonal frequencydivision multiplexing (OFDM) systems that exploit the Alamouti transmit diversity technique are addressed. In Alamouti spacetime coded OFDM systems, the simple Alamouti decoding at the receiver relies on the assumption that the chann ..."
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Cited by 4 (0 self)
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Abstract—In this paper, receiver designs for orthogonal frequencydivision multiplexing (OFDM) systems that exploit the Alamouti transmit diversity technique are addressed. In Alamouti spacetime coded OFDM systems, the simple Alamouti decoding at the receiver relies on the assumption that the channels do not change over an Alamouti codeword period (two consecutive OFDM symbol periods). Unfortunately, when the channel is fast fading, the assumption is not met, resulting in severe performance degradation. In this paper, a sequential decision feedback sequence estimation (SDFSE) scheme with an adaptive threshold (AT), a traditionally singlecarrier equalization technique, is used to mitigate the performance degradation. A new method to set the threshold value is proposed. For small signal constellations like BPSK and QPSK, the SDFSE with an AT requires much lower complexity than a previous minimum mean square error approach at the cost of a small performance degradation. Furthermore, we show that the performance difference becomes smaller when channel estimation error is included. An adaptive effort sequence estimation (AESE) scheme is also proposed to furthur reduce the average complexity of the SDFSE scheme with an AT. The AESE scheme is based on the observation that a high Doppler frequency does not necessarily mean significant instantaneous channel variation. Simulations show the efficacy of the proposed SDFSE with an AT and the AESE. Index Terms—Equalization, fast fading, orthogonal frequencydivision multiplexing (OFDM), sequence estimation, transmit diversity. I.
Fast Maximum Likelihood Sequence Detection over Vector Intersymbol Interference Channels
 IEEE ICASSP
, 2007
"... We consider the communication system that transmits a sequence of binary vector symbols over a vector intersymbol interference (ISI) channels subject to additive white Gaussian noise. Conventionally, maximum likelihood (ML) sequence is computed using the Viterbi Algorithm (VA), whose complexity scal ..."
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Cited by 2 (2 self)
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We consider the communication system that transmits a sequence of binary vector symbols over a vector intersymbol interference (ISI) channels subject to additive white Gaussian noise. Conventionally, maximum likelihood (ML) sequence is computed using the Viterbi Algorithm (VA), whose complexity scales exponentially in both the symbol vector length and the number of ISI channel taps. We show that, as the signal to noise ratio (SNR) goes to infinity, the ML sequence can be obtained with an asymptotic complexity scaling linearly in the number of channel taps and quadratically in the symbol vector length. Index Terms — Maximum likelihood, Sequence detection, Statistical information, Viterbi algorithm
Truncation for Low Complexity MIMO Signal Detection
"... Abstract–Joint maximumlikelihood (JML) detector may be used in memoryless multiple input multiple output (MIMO) systems to obtain optimal detection performance. However, the JML detector needs an exhaustive search and causes prohibitively large decoding complexity. To reduce the complexity of MIMO ..."
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Abstract–Joint maximumlikelihood (JML) detector may be used in memoryless multiple input multiple output (MIMO) systems to obtain optimal detection performance. However, the JML detector needs an exhaustive search and causes prohibitively large decoding complexity. To reduce the complexity of MIMO signal detection, minimum meansquareerror (MMSE) linear detector (LD), decisionfeedback detector (DFD) and sphere detector (SD) may be used. In this paper, we propose a truncation based detector for low complexity MIMO signal detection, and give theoretical insight into the design and performance. We study bitruncation in detail and present two bitruncation approaches. These approaches have lowcomplexity, and computer simulation results show that they outperform MMSELD and MMSEDFD. Keywords–MIMO signal detection, channel truncation, bitruncation, Viterbi Algorithm. I.