Ordered Binary-Decision Diagrams (OBDDS) represent Boolean functions as directed acyclic graphs. They form a canonical representation, making testing of functional properties such as satmfiability and equivalence straightforward. A number of operations on Boolean functions can be implemented as graph algorithms on OBDD

This paper describes a new BDD-based logic optimization system, BDS. It is based on a recently developed theory for BDD-based logic decomposition, which supports both algebraic and Boolean factorization. New techniques, which are crucial to the manipulation of BDDs in a partitioned Boolean network environment, are described in detail. The experimental results show that BDS has a capability to handle very large circuits. It offers a superior runtime advantage over SIS, with comparable results in terms of circuit area and often improved delay.

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OBDD's are the state-of-the-art data structure for Boolean function manipulation since basic tasks of Boolean manipulation such as testing equivalence, satisfiability, or tautology, and performing single Boolean synthesis steps can be done efficiently. In the following we show that the efficient manipulation of OBDD's can be extended to a more general data structure, so-called FBDD's. In detail, the advantages of using FBDD's instead of OBDD's are ffl FBDD's are generally more (sometimes even exponentially more) succinct than OBDD's, ffl FBDD's provide, similarly to OBDD's, canonical representations of Boolean functions, and ffl in terms of FBDD's basic tasks of Boolean manipulation can be performed similarly efficient as in terms of OBDD's. The power of the FBDD-concept is demonstrated by showing that the verification of the benchmark circuit design for the hidden weighted bit function HWB proposed by Bryant can be carried out efficiently in terms of FBDD's while, for princip...

There are two major approaches to the synthesis of logic circuits. One is based on a predominantly algebraic factorization leading to AND/OR logic optimization. The other is based on classical Reed-Muller decomposition method and its related decision diagrams, which have been shown to be efficient for XOR-intensive arithmetic functions. Both approaches share the same characteristics: while one is strong at one class of functions, it is weak at the other's.

This paper presents two algorithms for doing mapping from multi-level logic to selector-based field-programmable gate arrays, such as the Actel chip. The gate counts and CPU time are compared with two previous mappers for these architectures: misII and mis-pga. The Amap algorithm use 6 % fewer cells than misII and only about 8 % more cells than the best achieved by mis-pga, and is at least 25 times as fast as misII and at least 586 times as fast as mis-pga. The XAmap algorithm is slightly slower, and not quite aa effective.

We present a class of Ordered Binary Decision Diagrams, Differential bdds (\Deltabdds), and transformations Push-up (") and Delta (ffi) over them. In addition to the ordinary node-sharing in normal bdds, isomorphic substructures can be collapsed further in \Deltabdds and their derived classes, forming a more compact representation of boolean functions. The elimination of isomorphic substructures coincides with the repetitive occurrences of small components in many applications of bdds. The reduction is potentially exponential in the number of nodes and proportional to the number of variables, while operations on \Deltabdds remain efficient.

A disjoint support decomposition (DSD) is a representation of a Boolean function F obtained by composing two or more simpler component functions such that the component functions have no common inputs. The decomposition of a function is desirable for several reasons. First, it’s a method to obtain a multiple-level implementation of a function. It leads to a partition in simpler blocks that easily results in smaller areas and fewer interconnects. Moreover, it exposes a parallelism in the computation of the function that can be exploited by hardware as well as during simulation. In this paper we present a novel algorithm, STACCATO, that generates a DSD decomposition starting from the BDD of a function. STACCATO is novel because 1) it provides a complete description of each decomposition, that is, it computes the ”kernel” function K relating the elements of each decomposition, and 2) it has better performance than previously known algorithms. Experimental results run on both IWLS and industrial testbenches show that STACCATO’s performance is in most cases three times as fast or more than previously known solutions.

New symmetries of degree two are introduced, along with spectral techniques for identifying these symmetries. Some applications of these symmetries are discussed, in particular their application to the construction of binary decision diagrams and the implementation of Boolean functions. 1.

Abstract — This paper presents a heuristic algorithm for disjoint decomposition of a Boolean function based on its ROBDD representation. Two distinct features make the algorithm feasible for large functions. First, for an n-variable function, it checks only O(n 2) candidates for decomposition out of O(2 n) possible ones. A special strategy for selecting candidates makes it likely that all other decompositions are encoded in the selected ones. Second, the decompositions for the approved candidates are computed using a novel IntervalCut algorithm. This algorithm does not require re-ordering of ROBDD. The combination of both techniques allows us to decompose the functions of size beyond that possible with the exact algorithms. The experimental results on 582 benchmark functions show that the presented heuristic finds 95 % of all decompositions on average. For 526 of those functions, it finds 100 % of the decompositions. I.