et al., “Reprogrammable Network Packet Processing on the Field Programmable Port Extender (2001)

by J W Lockwood
Venue:FPX),” Proc. ACM Int’l Symp. Field Programmable Gate Arrays (FPGA 01), ACM
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Deep Packet Inspection Using Parallel Bloom Filters

by Sarang Dharmapurikar, Praveen Krishnamurthy, Todd Sproull, John Lockwood, Line Speeds , 2004
"... this memory core, five random-memory locations are readable in a single clock cycle. So performing 35 concurrent memory operations requires seven parallel memory cores, each with one-seventh of the required array size, as Figure 5b illustrates. Because the basic Bloom filter allows any hash function ..."
Abstract - Cited by 123 (18 self) - Add to MetaCart
this memory core, five random-memory locations are readable in a single clock cycle. So performing 35 concurrent memory operations requires seven parallel memory cores, each with one-seventh of the required array size, as Figure 5b illustrates. Because the basic Bloom filter allows any hash function to map to any bit in the vector, it is possible that for some member, more than five hash functions map to the same memory segment, thereby exceeding the lookup capacity of this memory core. We can solve this problem by restricting the range of each hash function to a given memory, preventing memory contention