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229
A new approach to the maximum flow problem
- Journal of the ACM
, 1988
"... Abstract. All previously known efftcient maximum-flow algorithms work by finding augmenting paths, either one path at a time (as in the original Ford and Fulkerson algorithm) or all shortest-length augmenting paths at once (using the layered network approach of Dinic). An alternative method based on ..."
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Cited by 391 (27 self)
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Abstract. All previously known efftcient maximum-flow algorithms work by finding augmenting paths, either one path at a time (as in the original Ford and Fulkerson algorithm) or all shortest-length augmenting paths at once (using the layered network approach of Dinic). An alternative method based on the preflow concept of Karzanov is introduced. A preflow is like a flow, except that the total amount flowing into a vertex is allowed to exceed the total amount flowing out. The method maintains a preflow in the original network and pushes local flow excess toward the sink along what are estimated to be shortest paths. The algorithm and its analysis are simple and intuitive, yet the algorithm runs as fast as any other known method on dense. graphs, achieving an O(n)) time bound on an n-vertex graph. By incorporating the dynamic tree data structure of Sleator and Tarjan, we obtain a version of the algorithm running in O(nm log(n’/m)) time on an n-vertex, m-edge graph. This is as fast as any known method for any graph density and faster on graphs of moderate density. The algorithm also admits efticient distributed and parallel implementations. A parallel implementation running in O(n’log n) time using n processors and O(m) space is obtained. This time bound matches that of the Shiloach-Vishkin algorithm, which also uses n processors but requires O(n’) space.
Propositional Semantics for Disjunctive Logic Programs
- Annals of Mathematics and Artificial Intelligence
, 1994
"... In this paper we study the properties of the class of head-cycle-free extended disjunctive logic programs (HEDLPs), which includes, as a special case, all nondisjunctive extended logic programs. We show that any propositional HEDLP can be mapped in polynomial time into a propositional theory such th ..."
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Cited by 138 (2 self)
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In this paper we study the properties of the class of head-cycle-free extended disjunctive logic programs (HEDLPs), which includes, as a special case, all nondisjunctive extended logic programs. We show that any propositional HEDLP can be mapped in polynomial time into a propositional theory such that each model of the latter corresponds to an answer set, as defined by stable model semantics, of the former. Using this mapping, we show that many queries over HEDLPs can be determined by solving propositional satisfiability problems. Our mapping has several important implications: It establishes the NP-completeness of this class of disjunctive logic programs; it allows existing algorithms and tractable subsets for the satisfiability problem to be used in logic programming; it facilitates evaluation of the expressive power of disjunctive logic programs; and it leads to the discovery of useful similarities between stable model semantics and Clark's predicate completion. 1 Introduction ...
Property Testing in Bounded Degree Graphs
- Algorithmica
, 1997
"... We further develop the study of testing graph properties as initiated by Goldreich, Goldwasser and Ron. Whereas they view graphs as represented by their adjacency matrix and measure distance between graphs as a fraction of all possible vertex pairs, we view graphs as represented by bounded-length in ..."
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Cited by 107 (32 self)
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We further develop the study of testing graph properties as initiated by Goldreich, Goldwasser and Ron. Whereas they view graphs as represented by their adjacency matrix and measure distance between graphs as a fraction of all possible vertex pairs, we view graphs as represented by bounded-length incidence lists and measure distance between graphs as a fraction of the maximum possible number of edges. Thus, while the previous model is most appropriate for the study of dense graphs, our model is most appropriate for the study of bounded-degree graphs. In particular, we present randomized algorithms for testing whether an unknown boundeddegree graph is connected, k-connected (for k ? 1), planar, etc. Our algorithms work in time polynomial in 1=ffl, always accept the graph when it has the tested property, and reject with high probability if the graph is ffl-away from having the property. For example, the 2-Connectivity algorithm rejects (w.h.p.) any N-vertex d-degree graph for which more ...
Automatic graph drawing and readability of diagrams
- IEEE Transactions on Systems, Man and Cybernetics
, 1988
"... Ahtract-Diagrams are widely used in several areas of computer wience, and their effectiveness is thoroughly recognized. One of the main qualities requested for them is readability; this is especially, but not exclusively, true in the area of information systems, where diagrams are used to model data ..."
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Cited by 88 (7 self)
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Ahtract-Diagrams are widely used in several areas of computer wience, and their effectiveness is thoroughly recognized. One of the main qualities requested for them is readability; this is especially, but not exclusively, true in the area of information systems, where diagrams are used to model data and functions of the application. Up to now, diagrams have been produced manually or with the aid of a graphic editor; in both caws placement of symbols and routing of connections are under responsi-bility of the designer. The goal of the work is to investigate how readability of diagrams can be achieved by means of automatic tools. Existing results in the literature are compared, and a comprehensive algorithmic approach to the problem is proposed. The algorithm presented draws graphs on a grid and is suitable for both undirected graphs and mixed graphs that contain as subgraphs hierarchic structures. Finally, several applications of a graphic tool that embodies the aforementioned facility are shown. I.
An Exact Solution to the Transistor Sizing Problem for CMOS Circuits Using Convex Optimization
- IEEE Transactions on Computer-Aided Design
, 1993
"... this paper. Given the MOS circuit topology, the delay can be controlled byvarying the sizes of transistors in the circuit. Here, the size of a transistor is measured in terms of its channel width, since the channel lengths in a digital circuit are generally uniform. Roughly speaking, the sizes of ..."
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Cited by 81 (18 self)
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this paper. Given the MOS circuit topology, the delay can be controlled byvarying the sizes of transistors in the circuit. Here, the size of a transistor is measured in terms of its channel width, since the channel lengths in a digital circuit are generally uniform. Roughly speaking, the sizes of certain transistors can be increased to reduce the circuit delay at the expense of additional chip area
Towards a High-Level Power Estimation Capability
- IEEE trans. on CAD
, 1996
"... We will present a power estimation technique for digital integrated circuits that operates at the register transfer level (RTL). Such a high-level power estimation capability is required in order to provide early warning of any power problems, before the circuit-level design has been specified. With ..."
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Cited by 78 (9 self)
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We will present a power estimation technique for digital integrated circuits that operates at the register transfer level (RTL). Such a high-level power estimation capability is required in order to provide early warning of any power problems, before the circuit-level design has been specified. With such early warning, the designer can explore design trade-offs at a higher level of abstraction than previously possible, reducing design time and cost. Our estimator is based on the use of entropy as a measure of the average activity to be expected in the final implementation of a circuit, given only its Boolean functional description. This technique has been implemented and tested on a variety of circuits. The empirical results to be presented are very promising and demonstrate the feasibility and utility of this approach. y This work was supported in part by Intel Corp., Santa Clara, CA. Submitted to the IEEE Transactions on CAD, 1995. 1. Introduction The high device count and operati...
Path-Based Scheduling for Synthesis
- IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
, 1991
"... In the context of synthesis, scheduling assigns operations to control steps. Operations are the atomic components used for de-scribing behavior, for example, arithmetic and Boolean operations. They are ordered partially by data dependencies (data-flow graph) and by control constructs such as condit ..."
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Cited by 77 (0 self)
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In the context of synthesis, scheduling assigns operations to control steps. Operations are the atomic components used for de-scribing behavior, for example, arithmetic and Boolean operations. They are ordered partially by data dependencies (data-flow graph) and by control constructs such as conditional branches and loops (control-flow graph). A control step usually corresponds to one state, one clock cycle, or one microprogram step. This paper presents a new, path-based scheduling algorithm. It yields solutions with the minimum num-ber of control steps, taking into account arbitrary constraints that limit the amount of operations in each control step. The result is a finite state machine that implements the control. Although the complexity of the algorithm is proportional to the number of paths in the control-flow graph, it is shown to be practical for large examples with thousands of nodes.
A Clustering Algorithm based on Graph Connectivity
- Information Processing Letters
, 1999
"... We have developed a novel algorithm for cluster analysis that is based on graph theoretic techniques. ..."
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Cited by 74 (3 self)
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We have developed a novel algorithm for cluster analysis that is based on graph theoretic techniques.
On the Feasibility of Distributed Constraint Satisfaction
, 1991
"... This paper characterizes connectionist-type architectures that allow a distributed solution for classes of constraint-satisfaction problems. The main issue addressed is whether there exists a uniform model of computation (where all nodes are indistinguishable) that guarantees convergence to a ..."
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Cited by 61 (12 self)
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This paper characterizes connectionist-type architectures that allow a distributed solution for classes of constraint-satisfaction problems. The main issue addressed is whether there exists a uniform model of computation (where all nodes are indistinguishable) that guarantees convergence to a solution from every initial state of the system, whenever such a solution exists. We show that even for relatively simple constraint networks, such as rings, there is no general solution using a completely uniform, asynchronous, model. However, some restricted topologies like trees can accommodate the uniform, asynchronous, model and a protocol demonstrating this fact is presented. An almost-uniform, asynchronous, networkconsistency protocol is also presented. We show that the algorithms are guaranteed to be selfstabilizing, which makes them suitable for dynamic or error-prone environments. 1 Introduction Consider the distributed version of the graph coloring problem, where ea...
Clique Partitions, Graph Compression and Speeding-up Algorithms
- Journal of Computer and System Sciences
, 1991
"... We first consider the problem of partitioning the edges of a graph G into bipartite cliques such that the total order of the cliques is minimized, where the order of a clique is the number of vertices in it. It is shown that the problem is NP-complete. We then prove the existence of a partition of s ..."
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Cited by 57 (3 self)
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We first consider the problem of partitioning the edges of a graph G into bipartite cliques such that the total order of the cliques is minimized, where the order of a clique is the number of vertices in it. It is shown that the problem is NP-complete. We then prove the existence of a partition of small total order in a sufficiently dense graph and devise an efficient algorithm to compute such a partition. It turns out that our algorithm exhibits a trade-off between the total order of the partition and the running time. Next, we define the notion of a compression of a graph G and use the result on graph partitioning to efficiently compute an optimal compression for graphs of a given size. An interesting application of the graph compression result arises from the fact that several graph algorithms can be adapted to work with the compressed representation of the input graph, thereby improving the bound on their running times, particularly on dense graphs. This makes use of the trade-off ...

