Abstract. Formal and semi-formal verification of analog/mixed-signal circuits is complicated by the difficulty of obtaining circuit models suitable for analysis. We propose a method to generate a formal model from simulation traces. The resulting model is conservative in that it includes all of the original simulation traces used to generate it plus additional behavior. Information obtained during the model generation process can also be used to refine the simulation and verification process. 1

Abstract. This paper presents a bounded model checking algorithm for the verification of analog and mixed-signal (AMS) circuits using a satisfiability modulo theories (SMT) solver. The systems are modeled in VHDL-AMS, a hardware description language for AMS circuits. In this model, system safety properties are specified as assertion statements. The VHDL-AMS description is compiled into labeled hybrid Petri nets (LHPNs) in which analog values are modeled as continuous variables that can change at rates in a bounded range and digital values are modeled using Boolean signals. The verification method begins by transforming the LHPN model into an SMT formula composed of the initial state, the transition relation unrolled for a specified number of iterations, and the complement of the assertion in each set of state variables. When this formula evaluates to true, this indicates a violation of the assertion and an error trace is reported. This method has been implemented and preliminary results are promising. 1

Abstract. If the inputs to a circuit are held constant, then the state of some circuits settle to a unique equilibrium: the DC operating point. Many circuit analysis techniques seek to determine or use this state and assume that it is unique. However, for some constant input some circuits may settle to one of several different operating points, while still others may never settle. In this paper we describe a procedure that uses symbolic circuit models generated from a netlist level circuit description to rigorously locate and classify all of the equilibria of a circuit model in order to determine the existence, location and number of DC operating points. Implemented with a collection of public tools (HySAT, INTLAB and EigTool) and our own MATLAB circuit modeling system OOmspice, we demonstrate that the technique can deduce the hysteresis of a Schmitt trigger and the lack of DC operating points for a ring oscillator with an odd number of stages. 1