Abstract The semantics of hardware description languages can be represented in higher order logic. This provides a formal definition that is suitable for machine processing. Experiments are in progress at Cambridge to see whether this method can be the basis of practical tools based on the HOL theorem-proving assistant. Three languages are being investigated: ELLA, Silage and VHDL. The approaches taken for these languages are compared and current progress on building semantically-based theorem-proving tools is discussed.

i Hierarchical Design Space Exploration for a Class of Digital Systems Abstract This paper presents an architectural synthesis approach for a widely used class of digital systems characterized by inherent regularity in their description. This approach relies on a novel modeling or abstraction of the problem domain to facilitate a hierarchical solution method. The modeling is based on exploiting the inherent regularity in the system description to cluster its behavioral operations. The method emphasizes prudent postponement of design decisions until enough physical design information is available to estimate layout effects like wiring; we use well-known area-delay estimators for this purpose. The approach has the advantage that it keeps track of a set of potentially good candidate solutions, rather than narrowing down to a single solution very early in the design process. Through an extensive set of experiments on well known DSP design examples, we demonstrate the advantages that such distinctive features have to offer; the impact of hierarchy on several important issues like interconnection area, extent of design space explored, etc. is presented.

A new design method for synchronous digital VLSI circuits based on the ideas of transformational design is developed. The central idea is to derive an implementation from a behavioral specification by means of behavior-preserving transformations. An essential part of such a methodology is a design representation language which can be used during the complete synthesis trajectory. For this purpose a signal flow graph language called SIL is developed as part of the SPRITE project (EC ESPRIT project 2260). Introduction Current design methods for VLSI circuits have several shortcomings in areas such as design productivity, circuit cost, quality, and time-to-market. A new method based on the ideas of transformational design is being developed to tackle these problems. An important secondary objective is to develop a method which blends easily into current and future design methods to ease transition between them. Although the focus will be on the design of synchronous digital circuits, ma...

In the design of modern digital systems, such as image processing systems, it is, because of their complexity, of great importance that correctness is guaranteed during the design. Transformational design is a method that integrates guaranteed correctness into the design process. Correctness-by-construction is obtained by applying local behavior-preserving transformations ---which have themselves already been proven correct--- to derive an implementation from a specification. Essential to the transformational design method are design representations which have formal semantics, in order to prove the behavior-preserving property of transformations. Also, it is significantly simplified when a single design representation language is used during the complete synthesis trajectory. Flow graph languages, as demonstrated by their application in many high-level synthesis tools, are good candidates for such representations. At the University of Twente, TRADES (Transformational Design System...

In this paper, we provide a practical transformational approach to the synthesis of correct synchronous digital hardware designs from high-level specifications. We do this while taking into account the complete life cycle of a design from early prototype to full custom implementation. Besides time-to-market, both flexibility with respect to target architecture and efficiency issues are addressed by the methodology. The utilization of user-selected behaviorpreserving transformation steps ensures first-time-right designs while exploiting the experience, flexibility, and creativity of the designer. To ensure that design transformations are indeed behavior-preserving a novel mechanized approach to the specification and verification of design transformations on control data flow graphs which is independent of a specific behavioral model or graph size has been developed. As a demonstration of an industrial application we use a video processing algorithm needed for the conversion from a li...

This paper discusses a novel transformation based design methodology and its use in the design of complex programmable VLSI systems. During the life cycle of a complex system the optimal trade-off between, partially, implementing in hardware or software is changing. This is due to varying system requirements (short time-to-market, low-cost, low-power etc.) and improving device technology. The proposed methodology allows such redesigns to be made, using different hardware-software trade-offs, in a guaranteed correct way. 1. Introduction During the life cycle of a system the optimal trade-off between software versus hardware implementation changes. Initially time-to-market and rapid prototyping are the primary objectives, which require the use of flexible general-purpose reusable and programmable hardware. Later on in its life cycle other considerations become important. High-end features move down towards the domain of mass production where implementation cost becomes the dominant dri...

Different types of problems in the hardware veri-fication field have inspired different methodologies to tackle them. When different approaches can verify the same class of circuits, at a given level of abstraction, it is often the case that each one has advantages and drawbacks with respect to the others. Comparing dif-ferent methodologies is important, not only to identify the right tool for the right task, but also to evaluate the compromises of different approaches. This paper summarises a comparison between the theorem prov-ing environments HOL and Boyer-Moore, based on a practical experience with both systems for the verifi-cation of a parameterised module from the CATHE DRAL Silicon Compiler library.

The goal of this paper is to extend the synthesis of real time digital signal processing (DSP) algorithms towards the domain of high throughput applications. A novel architec-tural style specitlcally suited for this application domain is presented. Furthermore, a synopsis of a novel synthe-sis script typically oriented towards this architecture is de-scribed (architecture-driven synthesis). The emphasis in the script is on the design of the data-paths which are dedicated to the application, and special attention is paid to the memory synthesis problem. In this paper only the data-path related tasks, namely data-path partitioning and data-path definition, are discussed. The new methodology is demonstrated using an image processing application. 1

This report contains transparencies of a presentation on the design process in the University of California Irvine's Behavioral-Synthesis Environment. The human-interface aspects of the environment are discussed in detail and several design-process examples are given to demonstrate the power and usefulness of this environment for behavioral synthesis. Contents 1 Introduction 1 1.1 Motivation : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 1 1.2 Goals : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 3 1.3 The Decision Support Environment : : : : : : : : : : : : : : : : : : : : : 5 2 DSE Displays 7 2.1 The State-Actions Table : : : : : : : : : : : : : : : : : : : : : : : : : : : 7 2.2 The State-Actions Table: An Example : : : : : : : : : : : : : : : : : : : 9 2.3 Component Selection and Allocation : : : : : : : : : : : : : : : : : : : : 11 2.4 The Connectivity Table and Floorplan : : : : : : : : : : : : : : : : : : : 13 3 Displays for...

The goal of this paper is to extend the synthesis of real time digital signal processing (DSP) algorithms towards the domain of high throughput applications. A novel architectural style specifically suited for this application domain is presented. Furthermore, a synopsis of a novel synthesis script typically oriented towards this architecture is de- scribed (architecture-driven synthesis). The emphasis in the script is on the design of the data-path, which are dedicated to the application, and special attention is paid to the memory synthesis problem. In this paper only the data-path related tasks, namely data-path partitioning and data-path definition, are discussed. The new methodology is demonstrated using an image processing application.