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We describe the implementation of the LEDA [MN95, Nah95] data type real. Every integer is a real and reals are closed under the operations addition, subtraction, multiplication, division and squareroot. The main features of the data type real are ffl The user--interface is similar to that of the built--in data type double.

An algorithm is described for multiplying multiprecision floating point numbers. The returned result is equal to the floating point number obtained by rounding the exact product. Software implementations of multiprecision floating point multiplication can reduce the computing time by a factor of two if they do not compute the low order digits of the product of the two mantissas. However, these algorithms do not necessarily provide exactly rounded results. The algorithm described in this paper is guaranteed to produce exactly rounded results and typically obtains the same savings. 1 Introduction We present an algorithm for multiplying multiprecision floating point numbers. The returned result is equal to the floating point number obtained by rounding the exact product. A rounding operation which satisfies this requirement is called exact rounding. Exact rounding provides a well defined, implementation independent semantics for floating point arithmetic. For this reason, floating point ...

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To my parents iii Acknowledgment First of all, I wish to express my profound gratitude to my advisor, Professor Chee Yap. Without his encouragement, support and patient guidance, most of this would not have been possible. He has always been available and enthusiastic to help when I need it during the last four years. His insightful advice laid the foundation of my work.

About half the hardware for floating point multipliers is needed only to guarantee correctly rounded results. For multimedia, graphics, and DSP systems, a significant reduction in area, delay, and power can be achieved by producing results that are not correctly rounded. This paper presents an efficient method for designing variable-correction truncated floating point multipliers that produce results with a maximum error of less than one unit in the last place. With this method, several of the less significant columns of the significand multiplier and the rounding logic for floating point multiplication are eliminated. Technical areas: (13) DSP hardware, software, and coreware; (14) ASIC and FPGA algorithm/processor design. POC: Michael Schulte, 19 Memorial Dr. West, EECS Dept., Lehigh University, Bethlehem, PA 18015. Email: mschulte@eecs.lehigh.edu, Phone: (610) 758-5036, FAX: (610) 758-6279. Extended Abstract Most modern processors perform floating point operations accord...

Trigonometric functions are often needed in embedded real-time software. To fulfill concrete resource demands, different implementation strategies of trigonometric functions are possible. In this paper we analyze the resource demands of iterative calculations compared to other implementation strategies, using the trigonometric functions as a case study. By analyzing the worst-case execution time (WCET) of the different calculation techniques of trigonometric functions we got the surprising result that the WCET of iterative calculations is quite competitive to alternative calculation techniques, while their economics on memory demand is far superior. Finally, a discussion of the general applicability of the obtained results is given as a design guide for embedded software. 1

Inverse square roots are used in several digital signal processing, multimedia, and scientific computing applications. This paper presents a high-speed method for computing inverse square roots. This method uses a table lookup, operand modification, and multiplication to obtain an initial approximation to the inverse square root. This is followed by a modified Newton-Raphson iteration, consisting of one square, one multiply-complement, and one multiplyadd operation. The initial approximation and NewtonRaphson iteration employ specialized hardware to reduce the delay, area, and power dissipation. Application of this method is illustrated through the design of an inverse square root unit for operands in the IEEE single precision format. An implementation of this unit with a 4-layer metal, 2.5 Volt, 0.25 micron CMOS standard cell library has a cycle time of 6.7 ns, an area of 0.41 mm 2 , a latency of five cycles, and a throughput of one result per cycle. 1. Introduction Square roots a...

Controlled Perturbation (CP, for short) is an approach to implement efficient and robust geometric algorithms using the computational speed of builtin finite precision arithmetic, while bypassing precision problems during the computation. Furthermore it avoids the time-consuming and error-prone discussion of degenerate cases. CP replaces the input objects by a set of randomly perturbed (moved, scaled, stretched, etc.) objects such that the algorithm is guaranteed to compute the exact combinatorial structure that these objects imply. This paper is meant as a guide how to decide if CP can be applied to a given algorithm, and if, how to correlate all CP parameters: the perturbation amount δ, the arithmetic precision L, the maximum range of input values [−m,m], the number of input objects n, the error bound B f of the (chosen) predicate evaluations, and the probability P of a successful computation. For this purpose we present a general methodology to analyze predicate functions that leads to an inequality correlating these parameters and hence to bounds on the precision or perturbation amount. In particular we treat the case of the wide used class of polynomial predicates in detail. Advantages, drawbacks and implementation issues are discussed.

Dedicated to the friends and families who blessed and supported me iv