In addition to correctness requirements, a real-time system must also meet its temporal constraints, often expressed as deadlines. We call safety or mission critical real-time systems which may miss some deadlines critical soft real-time systems to distinguish them from hard real-time systems, where all deadlines must be met, and from soft real-time systems which are not safety or mission critical. The performance of a critical soft real-time system is acceptable as long as the deadline miss rate is below an application specific threshold. Architectural features of computer systems, such as caches and branch prediction hardware, are designed to improve average performance. Deterministic real-time design and analysis approaches require that such features be disabled to increase predictability. Alternatively, allowances must be made for for their effects by designing for the worst case. Either approach leads to a decrease in average performance. Since critical soft real-time systems do not require that all deadlines be met, average performance can be improved by adopting a probabilitistic approach. In order to allow a trade-off between deadlines met and average

Multiple-class multiple-resource (MCMR) systems, where each class of customers requires a particular set of resources, are common. These systems are often analyzed under steady-state conditions. We describe a simple method, referred to as Z-iteration, to estimate both transient and steady-state performances of such systems. The method makes use of results and techniques available from queueing theory, network analysis, dynamic flow theory, and numerical analysis. We show the generality of the Z-iteration by applying it to an ATM network, a parallel disk system, and a distributed batch system. Validations against discreteevent simulations show the accuracy and computational advantages of the Z-iteration. 1 Introduction We consider a general multiple-class multiple-resource (MCMR) system. We have a set R of resources and a set C of customer classes. The nature of a resource depends on the system being modeled; for example, it may be computer memory, floor space, transmission capacity, e...

In the emerging IEEE 802.11e MAC protocol, the Enhanced Distributed Channel Access (EDCA) is proposed to support prioritized QoS; however, it cannot guarantee strict QoS required by real-time services such as voice and video without proper network control mechanisms. To overcome this deficiency, we first build an analytical model to derive an average delay estimate for the traffic of different priorities in the unsaturated 802.11e WLAN, showing that the QoS requirements of the realtime traffic can be satisfied if the input traffic is properly regulated. Then, we propose two effective call admission control schemes and a rate control scheme that relies on the average delay estimates and the channel busyness ratio, an index that can accurately represent the network status. The key idea is, when accepting a new real-time flow, the admission control algorithm considers its effect on the channel utilization and the delay experienced by existing real-time flows, ensuring that the channel is not overloaded and the delay requirements are not violated. At the same time, the rate control algorithm allows the best effort traffic to fully use the residual bandwidth left by the real-time traffic, thereby achieving high channel utilization.

Personal communication networks support the delivery of communication services as the user moves from one region to another. When a mobile user/terminal receives a call, the network has to quickly determine its current location. The existing approach suffers from high delay in locating the mobile as it requires maintaining the current location in a stable storage that has to be always consulted to reach the mobile. To reduce this delay, many proposed schemes rely on caching the locations of mobiles, especially those which do not move too frequently. To measure mobility, the node that originates the call usually measures only those movements that it sees between successive calls to that mobile. In this paper, we present a caching scheme based on fully disseminating the location updates of mobiles to every node so as to increase the chance that the cache entry points to the correct location of the mobile user. We analyze our full dissemination based scheme and compare it to other caching ...

Abstract. M/G/1-type processes are commonly encountered when modeling modern complex computer and communication systems. In this tutorial, we present a detailed survey of existing solution methods for M/G/1-type processes, focusing on the matrix-analytic methodology. From first principles and using simple examples, we derive the fundamental matrix-analytic results and lay out recent advances. Finally, we give an overview of an existing, state-of-the-art software tool for the analysis of M/G/1-type processes. Keywords: M/G/1-type processes; matrix analytic method; Markov chains. 1

In this paper we focus on the behavior of adaptive control schemes for automatic learning. Estimates of the sensitivities are used in a gradient-based stochastic approximation procedure, in order to drive the process along the steepest descent trajectory in search for the optimum. The learning rates are kept constant for adaptability. For such procedures, convergence can be established in a weak sense. We consider a model problem of a flexible machine where the control parameter is a probability vector. We propose a new sensitivity estimator, generalizing the Phantom Rare Perturbation Analysis (RPA) estimator to multi-valued decisions. From the basic properties of the estimators, we build several updating rules based on the weak convergence theory to ensure asymptotic optimality. We illustrate the predicted theoretical behavior with computer simulations. Finally, we present the comparison between the behavior of our proposed scheme with a regenerative one for which we can establish str...

this paper, we will plot using logarithmic scales, usually multiplying by 1-ae. The curves are discontinuous because N is an integer function, and have negative slopes for small ae because of the factor 1-ae. Figure 5 shows that although the buffer size can become very large as ae

The state-of-the-art in multiprocessing today employs thousands of high-performance microprocessors. As system sizes continue to grow, increasing care must be taken to design cost-efficient, balanced (i.e. scalable) systems. This thesis addresses the scalability of sharedmemory multiprocessors, presenting a practical treatment of scalability, and proceeding to focus on aspects of two critical areas of large-scale system design: interconnection networks and cache coherence mechanisms. In these areas, pipelined-channel interconnection networks and pruning-cache directories are investigated, respectively. Pipelined-channel interconnection networks allow multiple bits to be simultaneously in flight on a single wire, decoupling channel throughput from channel latency. The first published performance analysis of the SCI ring, a new IEEE standard employing pipelined channels, is presented. This study serves as a proof-of-concept for pipelined-channel networks, demonstrating their very high p...

In this paper, we introduce and analyze a new cut-off priority scheme which provides a better grade-of-service to handoff traffic while maintaining high throughput for the originating calls. A hysteresis control is used for additional robustness. The system model is found to have a general level dependent Quasi-Birth-and-Death (QBD) structure. An efficient solution methodology is used taking full advantage of the problem structure. Our model extends, generalizes and unifies the existing models for cut-off priority schemes in wireless cellular networks.

In designing a multiprocessor architecture, the motivating factors are that the architecture should be general purpose, easier to program and at the same time scalable. The Data Diffusion Machine (DDM) seeks to fulfil such criteria. The DDM provides shared-data access on distributed memory hardware, allowing data to freely migrate to processors on demand. The DDM concept was originally proposed in terms of a hierarchy of buses, but has since been elaborated for different interconnects. This thesis presents a link-based realisation of the architecture and a link-based coherence protocol which is central in maintaining coherence of data. The link-based protocol exploits the combining properties of the DDM network to minimise traffic in the DDM hierarchy. The protocol also contains efficient and general support for synchronisation. To evaluate the design and performance of new architectures, trace-driven simulation is often used. This thesis presents a novel prototyping and performance ev...