Silicon integrated circuit spiral inductors and transformers are analyzed using electromagnetic analysis. With appropriate approximations, the calculations are reduced to electrostatic and magnetostatic calculations. The important effects of substrate loss are included in the analysis. Classic circuit analysis and network analysis techniques are used to derive two-port parameters from the circuits. From two-port measurements, loworder, frequency-independent lumped circuits are used to model the physical behavior over a broad-frequency range. The analysis is applied to traditional square and polygon inductors and transformer structures as well as to multilayer metal structures and coupled inductors. A custom computer-aided-design tool called ASITIC is described, which is used for the analysis, design, and optimization of these structures. Measurements taken over a frequency range from 100 MHz to 5 GHz show good agreement with theory.

Abstract—This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance. Index Terms—Eddy currents, inductor model, on-chip inductors, quality factor, self resonance, substrate loss. I.

We present an efficient method for optimal design and synthesis of CMOS inductors for use in RF circuits. This method uses the the physical dimensions of the inductor as the design parameters and handles a variety of specifications including fixed value of inductance, minimum self-resonant frequency, minimum quality factor, etc. Geometric constraints that can be handled include maximum and minimum values for every design parameter and a limit on total area. Our method is based on formulating the design problem as a special type of optimization problem called geometric programming, for which powerful efficient interior-point methods have recently been developed. This allows us to solve the inductor synthesis problem globally and extremely efficiently. Also,we can rapidly compute globally optimal trade-off curves between competing objectives such as quality factor and total inductor area. We have fabricated a number of inductors designed by the method, and found good agreement between the experimental data and the specifications predicted by our method. 1

The design and optimization of spiral inductors on silicon substrates, the related layout issues in integrated circuits, and the effect of the inductor-Q on the performance of radiofrequency (RF) building blocks are discussed. Integrated spiral inductors with inductances of 0.5--100 nH and Q's up to 40 are shown to be feasible in very-large-scale-integration silicon technology. Circuit design aspects, such as a minimum inductor area, the cross talk between inductors, and the effect of a substrate contact on the inductor characteristics are addressed. Important RF building blocks, such as a bandpass filter, low-noise amplifier, and voltage-controlled oscillator are shown to benefit substantially from an improved inductor-Q.

Abstract—A modification of stacked spiral inductors increases the self-resonance frequency by 100 % with no additional processing steps, yielding values of 5 to 266 nH and self-resonance frequencies of 11.2 to 0.5 GHz. Closed-form expressions predicting the self-resonance frequency with less than 5 % error have also been developed. Stacked transformers are also introduced that achieve voltage gains of 1.8 to 3 at multigigahertz frequencies. The structures have been fabricated in standard digital CMOS technologies with four and five metal layers. Index Terms—Inductors, oscillators, quality factor, RF circuits, self-resonance frequency, stacked spirals, transformers, tuned amplifiers.

Abstract not found

Abstract—In this paper, a closed-form integral representation for the eddy-current losses over a conductive substrate is presented. The results are applicable to monolithic inductors and transformers, especially when such structures are realized over an epitaxial CMOS substrate. The technique is verified against measured results from 100 MHz to 14 GHz for spiral inductors. Index Terms—CMOS substrate losses, eddy currents, monolithic inductors, monolithic transformers, spiral inductors, spiral transformers. I.

A 900 MHz low-noise amplifier (LNA) utilizing three monolithic transformers to implement on-chip tuning networks and requiring no external components has been integrated in 2.88 mm 2 in a standard digital 0.6 m CMOS process. A bias current reuse technique is employed to reduce power dissipation, and process-, voltage-, and temperature-tracking biasing techniques are used. At 900 MHz, the LNA dissipates 18 mW from a single 3 V power supply and provides 4.1 dB noise figure, 12.3 dB power gain, 00033.0 dB reverse isolation, and an input 1-dB compression level of 00016 dBm. Analysis and modeling considerations for silicon-based monolithic transformers are presented, and it is shown that a monolithic transformer occupies less die area and provides a higher quality factor than two independent inductors with the same effective inductance in differential applications. I. INTRODUCTION F INE-LINE CMOS technology easily provides high frequency active devices for use in RF applications (e...

This report contains a review of CMOS process technology in terms of radio-frequency (RF) performance around and beyond 1GHz. First, the use of integrated technology for wireless communications is justified and state-of-the-art commercial chipsets are presented. After CMOS is presented as a potential RF candidate, the major elements of the technology are evaluated in an RF context and current performance is listed. Elements include substrate, transistors, interconnects, passive devices, packaging technology, and design tools. Also the on-going process innovations are reviewed, and their impact on RF measures is discussed. T HE last few years, the wireless services industry has grown tremendously [70]. Due to the acceptance of the Internet, higher efficiency/mobility needs, and the massive advertisement performed by eager service provides, the requirements for more sophisticated wireless services are ever increasing [11, 40]. To get everyone connected "anywhere and anytime" is ...

In presenting this thesis in partial fulfilment of the requirements for a Postgraduate