In this paper, a method for nominal design of analog integrated circuits is presented that includes process variations and operating ranges by worst-case parameter sets. These sets are calculated adaptively during the sizing process based on sensitivity analyses. The method leads to robust designs with high parametric yield, while being much more efficient than design centering methods.

Analog Synthesis and Macromodeling approaches are increasingly dealing with large multi-dimensional databases: in most cases the circuit/system parameters and specifications visited during simulation sweeps. Harvesting such large samples for useful information requires the use of efficient data-rnining algorithms. This thesis studies methods for performing nearest neighbor queries (or similarity search) in spaces with high dimensionality. A new s~;~atial indexing and search strategy, using hashing and Binary Decision Diagrams (BDDs), called Implicit Boolean-Indexed Search (IBIS) is presented. This is compared with 3 competitive existing spatial indexing and nearest neighbor query schemes: a. Quadtree,, b. Linear Scan and c. SR-Tree. Acknowledgements I would like to thank my advisor, Prof. Rob A. Rutenbar, for his continuing support and guidance throughout the length of my research, and for his novel ideas about a BDD and hash table-based spatial:indexing schetne. I would also like to thank I)r. Tamal Mukherjec for useful suggestions regarding this thesis. My office-mate and research partner Mr. Hongzhou Liu was very supportive and full of ideas for my research. Thanks to him for

Design tool solutions for mixed-signal/RF circuit design