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An exploration methodology for VLIW architecture targeting multiBIBLIOGRAPHY 89 mode wireless baseband processing (2006)

by T Schuster, B Bougard, D N Bruna, E Matus, L V D Perre, G Fettweis
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Scheduling Algorithms for Instruction Set Extended Symmetrical Homogeneous Multiprocessor Systems-on-Chip

by Michael Montcalm
"... 1The M.A.Sc. program is a joint program with Carleton University, administered by OCIECE Embedded system designers face multiple challenges in fulfilling the runtime require-ments of programs. Effective scheduling of programs is required to extract as much parallelism as possible. These scheduling a ..."
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1The M.A.Sc. program is a joint program with Carleton University, administered by OCIECE Embedded system designers face multiple challenges in fulfilling the runtime require-ments of programs. Effective scheduling of programs is required to extract as much parallelism as possible. These scheduling algorithms must also improve speedup after instruction-set extensions have occurred. Scheduling of dynamic code at run time is made more difficult when the static components of the program are scheduled ineffi-ciently. This research aims to optimize a program’s static code at compile time. This is achieved with four algorithms designed to schedule code at the task and instruction level. Additionally, the algorithms improve scheduling using instruction set extended code on symmetrical homogeneous multiprocessor systems. Using these algorithms, we achieve speedups up to 3.86X over sequential execution for a 4-issue 2-processor system, and show better performance than recent heuristic techniques for small pro-grams. Finally, the algorithms generate speedup values for a 64-point FFT that are similar to the test runs. ii
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...mes two issue slots per processor, whereas all other results are assumed to have one issue slot per processor. . . . . . . . . . . . . . . . . . . . . . . . 70 5.5 List of hand optimized ISEs used in =-=[24]-=- . . . . . . . . . . . . . . . . 75 5.6 Speedup of FFT scheduling with ISEs in [24] . . . . . . . . . . . . . 75 5.7 Speedup of FFT scheduling with and without ISEs in this thesis . . 76 x List of Ter...

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