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Power System State Estimation with Dynamic Optimal Measurement Selection
- IN PROCEEDINGS OF 2011 IEEE SYMPOSIUM ON COM- PUTATIONAL INTELLIGENCE APPLICATIONS IN SMART GRID
, 2011
"... Power system measurement devices continue to evolve towards higher accuracy and update rate. On the other hand, the computation required for processing the enormous amounts of measurement data associated with large complex power systems makes real-time estimation a major challenge. In this paper we ..."
Abstract
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Cited by 2 (2 self)
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Power system measurement devices continue to evolve towards higher accuracy and update rate. On the other hand, the computation required for processing the enormous amounts of measurement data associated with large complex power systems makes real-time estimation a major challenge. In this paper we present the Lower Dimensional Measurement-space (LoDiM) state estimation method for large-scale and widearea interconnected power systems. We present the method in the context of the Kalman filter and Extended Kalman filter, however our measurement selection procedure is not filter-specific, i.e. it can also be applied on other state estimation methods such as particle filters and unscented filters. Our method can also take advantage of large-scale parallel computation techniques for further improvement. Moreover, the concept of LoDiM should be applicable to other large-scale, real-time and computationallyintensive state tracking systems beyond the power systems, such as weather forecasting systems, gas-pipeline systems, and other critical infrastructure.
MPI on a Million Processors
"... Abstract. Petascale machines with close to a million processors will soon be available. Although MPI is the dominant programming model today, some researchers and users wonder (and perhaps even doubt) whether MPI will scale to such large processor counts. In this paper, we examine this issue of how ..."
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Abstract. Petascale machines with close to a million processors will soon be available. Although MPI is the dominant programming model today, some researchers and users wonder (and perhaps even doubt) whether MPI will scale to such large processor counts. In this paper, we examine this issue of how scalable is MPI. We first examine the MPI specification itself and discuss areas with scalability concerns and how they can be overcome. We then investigate issues that an MPI implementation must address to be scalable. We ran some experiments to measure MPI memory consumption at scale on up to 131,072 processes or 80 % of the IBM Blue Gene/P system at Argonne National Laboratory. Based on the results, we tuned the MPI implementation to reduce its memory footprint. We also discuss issues in application algorithmic scalability to large process counts and features of MPI that enable the use of other techniques to overcome scalability limitations in applications. 1
Low-Pain, High-Gain Multicore Programming in Haskell Coordinating Irregular Symbolic Computations on MultiCore Architectures
"... With the emergence of commodity multicore architectures, exploiting tightly-coupled parallelism has become increasingly important. Functional programming languages, such as Haskell, are, in principle, well placed to take advantage of this trend, offering the ability to easily identify large amounts ..."
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With the emergence of commodity multicore architectures, exploiting tightly-coupled parallelism has become increasingly important. Functional programming languages, such as Haskell, are, in principle, well placed to take advantage of this trend, offering the ability to easily identify large amounts of fine-grained parallelism. Unfortunately, obtaining real performance benefits has often proved hard to realise in practice. This paper reports on a new approach using middleware that has been constructed using the Eden parallel dialect of Haskell. Our approach is “low pain ” in the sense that the programmer constructs a parallel program by inserting a small number of higher-order algorithmic skeletons at key points in the program. It is “high gain ” in the sense that we are able to get good parallel speedups. Our approach is unusual in that we do not attempt to use shared
Unterschrift Acknowledgements
"... Ich erkläre an Eides statt, daß ich die vorliegende Diplomarbeit selbständig und ohne fremde Hilfe verfaßt habe. Ich habe dazu keine weiteren als die angeführten Hilfsmittel benutzt und die aus anderen Quellen entnommenen Stellen als solche gekennzeichnet. ..."
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Ich erkläre an Eides statt, daß ich die vorliegende Diplomarbeit selbständig und ohne fremde Hilfe verfaßt habe. Ich habe dazu keine weiteren als die angeführten Hilfsmittel benutzt und die aus anderen Quellen entnommenen Stellen als solche gekennzeichnet.
Lino: a tiling language for arrays of processors
"... Lino is language for tiling large arrays of processor, in particular for multi-core. Lino is oriented to the coordination and communication aspects of multi-processing, and is otherwise implementation neutral, thus naturally facilitating the composition of large systems from heterogeneous software c ..."
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Lino is language for tiling large arrays of processor, in particular for multi-core. Lino is oriented to the coordination and communication aspects of multi-processing, and is otherwise implementation neutral, thus naturally facilitating the composition of large systems from heterogeneous software components. The need for Lino is motivated, and Lino’s design and implementation are surveyed. Lino, multi-core, tiling, coordination language 1.
State-of-the-art in heterogeneous computing
, 2010
"... Node level heterogeneous architectures have become attractive during the last decade for several reasons: compared to traditional symmetric CPUs, they offer high peak performance and are energy and/or cost efficient. With the increase of fine-grained parallelism in high-performance computing, as wel ..."
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Node level heterogeneous architectures have become attractive during the last decade for several reasons: compared to traditional symmetric CPUs, they offer high peak performance and are energy and/or cost efficient. With the increase of fine-grained parallelism in high-performance computing, as well as the introduction of parallelism in workstations, there is an acute need for a good overview and understanding of these architectures. We give an overview of the state-of-the-art in heterogeneous computing, focusing on three commonly found architectures: the Cell Broadband Engine Architecture, graphics processing units (GPUs), and field programmable gate arrays (FPGAs). We present a review of hardware, available software tools, and an overview of state-of-the-art techniques and algorithms. Furthermore, we present a qualitative and quantitative comparison of the architectures, and give our view on the future of heterogeneous computing.
GraVisMa 2009 Geometric Algebra Computers
"... Geometric algebra covers a lot of other mathematical systems like vector algebra, complex numbers, Plücker coordinates, quaternions etc. and it is geometrically intuitive to work with. Furthermore there is a lot of potential for optimization and parallelization. In this paper, we investigate compute ..."
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Geometric algebra covers a lot of other mathematical systems like vector algebra, complex numbers, Plücker coordinates, quaternions etc. and it is geometrically intuitive to work with. Furthermore there is a lot of potential for optimization and parallelization. In this paper, we investigate computers suitable for geometric algebra algorithms. While these geometric algebra computers are working in parallel, the algorithms can be described on a high level without thinking about how to parallelize them. In this context two recent developments are important. On one hand, there is a recent development of geometric algebra to an easy handling of engineering applications, especially in computer graphics, computer vision and robotics. On the other hand, there is a recent development of computer platforms from single processors to parallel computing platforms which are able to handle the high dimensional multivectors of geometric algebra in a better way. We present our geometric algebra compilation approach for current and future hardware platforms like reconfigurable hardware, multi-core architectures as well as modern GPGPUs. Keywords:

