A major focus of recent RF transceiver IC designs has been to increase both the integration and adaptability to multiple RF communication standards. Performing channel selection on chip at baseband allows the use of high-integration receiver architectures, and enhances programmability to different channel bandwidths and dynamic range requirements of multiple RF standards. A wideband, high-dynamic range sigma-delta modulator can be used to digitize both the desired signal and potentially stronger adjacent-channel interferers. In the digital domain, the decimation filter following the ADC can be easily made programmable. A 4th-order sigma-delta ADC which is capable of adapting to GSM (cellular) and DECT (cordless) communication standards is described. The ADC achieves 14 bits of resolution at 128x oversampling ratio (200kS/s Nyquist rate) for GSM, and 12 bits of i resolution at 32x oversampling ratio (1.4MS/s Nyquist rate) for DECT. Power reduction strategies are developed at both the sigma-delta architecture and circuit design levels. The experimental prototype, fabricated in a 0.35μm CMOS process, dissipates 70mW from a 3.3V supply.

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