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17
Robustness of Temporal Logic Specifications for ContinuousTime Signals
, 2009
"... In this paper, we consider the robust interpretation of Metric Temporal Logic (MTL) formulas over signals that take values in metric spaces. For such signals, which are generated by systems whose states are equipped with nontrivial metrics, for example continuous or hybrid, robustness is not only na ..."
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Cited by 43 (18 self)
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In this paper, we consider the robust interpretation of Metric Temporal Logic (MTL) formulas over signals that take values in metric spaces. For such signals, which are generated by systems whose states are equipped with nontrivial metrics, for example continuous or hybrid, robustness is not only natural, but also a critical measure of system performance. Thus, we propose multivalued semantics for MTL formulas, which capture not only the usual Boolean satisfiability of the formula, but also topological information regarding the distance, ε, from unsatisfiability. We prove that any other signal that remains εclose to the initial one also satisfies the same MTL specification under the usual Boolean semantics. Finally, our framework is applied to the problem of testing formulas of two fragments of MTL, namely Metric Interval Temporal Logic (MITL) and closed Metric Temporal Logic (clMTL), over continuoustime signals using only discretetime analysis. The motivating idea behind our approach is that if the continuoustime signal fulfills certain conditions and the discrete time signal robustly satisfies the temporal logic specification, then the corresponding continuoustime signal should also satisfy the same temporal logic specification.
Robust Test Generation and Coverage for Hybrid Systems
, 2007
"... Testing is an important tool for validation of the system design and its implementation. Modelbased test generation allows to systematically ascertain whether the system meets its design requirements, particularly the safety and correctness requirements of the system. In this paper, we develop a fr ..."
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Cited by 42 (13 self)
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Testing is an important tool for validation of the system design and its implementation. Modelbased test generation allows to systematically ascertain whether the system meets its design requirements, particularly the safety and correctness requirements of the system. In this paper, we develop a framework for generating tests from hybrid systems’ models. The core idea of the framework is to develop a notion of robust test, where one nominal test can be guaranteed to yield the same qualitative behavior with any other test that is close to it. Our approach offers three distinct advantages. 1) It allows for computing and formally quantifying the robustness of some properties, 2) it establishes a method to quantify the test coverage for every test case, and 3) the procedure is parallelizable and therefore, very scalable. We demonstrate our framework by generating tests for a navigation benchmark application.
AMT: a Propertybased Monitoring Tool for Analog Systems ⋆
"... Abstract. In this paper we describe AMT, a tool for monitoring temporal properties of continuous signals. We first introduce STL/PSL, a specification formalism based on the industrial standard language PSL and the realtime temporal logic MITL, extended with constructs that allow describing behavior ..."
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Cited by 32 (6 self)
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Abstract. In this paper we describe AMT, a tool for monitoring temporal properties of continuous signals. We first introduce STL/PSL, a specification formalism based on the industrial standard language PSL and the realtime temporal logic MITL, extended with constructs that allow describing behaviors of realvalued variables. The tool automatically builds property observers from an STL/PSL specification and checks, in an offline or incremental fashion, whether simulation traces satisfy the property. The AMT tool is validated through a Flash memory casestudy. 1
Analog/MixedSignal Circuit Verification Using Models Generated from Simulation Traces ⋆
"... Abstract. Formal and semiformal verification of analog/mixedsignal circuits is complicated by the difficulty of obtaining circuit models suitable for analysis. We propose a method to generate a formal model from simulation traces. The resulting model is conservative in that it includes all of the ..."
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Cited by 22 (6 self)
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Abstract. Formal and semiformal verification of analog/mixedsignal circuits is complicated by the difficulty of obtaining circuit models suitable for analysis. We propose a method to generate a formal model from simulation traces. The resulting model is conservative in that it includes all of the original simulation traces used to generate it plus additional behavior. Information obtained during the model generation process can also be used to refine the simulation and verification process. 1
Probabilistic temporal logic falsification of cyberphysical systems
 ACM Transactions on Embedded Computing Systems
"... We present a MonteCarlo optimization technique for finding system behaviors that falsify a Metric Temporal Logic (MTL) property. Our approach performs a random walk over the space of system inputs guided by a robustness metric defined by the MTL property. Robustness is guiding the search for a fal ..."
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Cited by 14 (12 self)
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We present a MonteCarlo optimization technique for finding system behaviors that falsify a Metric Temporal Logic (MTL) property. Our approach performs a random walk over the space of system inputs guided by a robustness metric defined by the MTL property. Robustness is guiding the search for a falsifying behavior by exploring trajectories with smaller robustness values. The resulting testing framework can be applied to a wide class of CyberPhysical Systems (CPS). We show through experiments on complex system models that using our framework can help automatically falsify properties with more consistency as compared to other means such as uniform sampling. 1
Analog Property Checkers: A DDR2 Case Study
 In Proc. Formal Verification of Analog Circuits (FAC
, 2008
"... Abstract. The formal specification component of verification can be exported to simulation through the idea of property checkers. The essence of this approach is the automatic construction of an observer from the specification in the form of a program that can be interfaced with a simulator and aler ..."
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Cited by 12 (3 self)
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Abstract. The formal specification component of verification can be exported to simulation through the idea of property checkers. The essence of this approach is the automatic construction of an observer from the specification in the form of a program that can be interfaced with a simulator and alert the user if the property is violated by a simulation trace. Although not complete, this lighter approach to formal verification has been effectively used in software and digital hardware to detect errors. Recently, the idea of property checkers has been extended to analog and mixed signal systems. In this paper, we apply the propertybased checking methodology to an industrial and realistic example of a DDR2 memory interface. The properties describing the DDR2 analog behavior are expressed in the formal specification language STL/PSL in form of assertions. The simulation traces generated from an actual DDR2 interface design are checked with respect to the STL/PSL assertions using the AMT tool. The focus of this paper is on the translation of the official (informal and descriptive) specification of a nontrivial DDR2 property into STL/PSL assertions. We study both the benefits and the current limits of such approach. 1
Approximate Bisimulation: A Bridge Between Computer Science and Control Theory
 EUROPEAN JOURNAL OF CONTROL (2011)56:568–578
, 2011
"... Fifty years ago, control and computing were part of a broader system science. After a long period of separate development within each discipline, embedded and hybrid systems have challenged us to reunite the, now sophisticated theories of continuous control and discrete computing on a broader syste ..."
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Cited by 12 (0 self)
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Fifty years ago, control and computing were part of a broader system science. After a long period of separate development within each discipline, embedded and hybrid systems have challenged us to reunite the, now sophisticated theories of continuous control and discrete computing on a broader system theoretic basis. In this paper, we present a framework of system approximation that applies to both discrete and continuous systems. We define a hierarchy of approximation metrics between two systems that quantify the quality of the approximation, and capture the established notions in computer science as zero sections. The central notions in this framework are that of approximate simulation and bisimulation relations and their functional characterizations called simulation and bisimulation functions and defined by Lyapunovtype inequalities. In particular, these functions can provide computable upperbounds on the approximation metrics by solving a static game. Our approximation framework will be illustrated by showing some of its applications in various problems such as reachability analysis of continuous systems and hybrid systems, approximation of continuous and hybrid systems by discrete systems, hierarchical control design, and simulationbased approaches to verification of continuous and hybrid systems.
Fainekos, “Falsification of temporal properties of hybrid systems using the crossentropy method
 in HSCC. ACM
"... Randomized testing is a popular approach for checking properties of large embedded system designs. It is well known that a uniform random choice of test inputs is often suboptimal. Ideally, the choice of inputs has to be guided by choosing the right input distributions in order to expose cornercas ..."
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Cited by 12 (5 self)
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Randomized testing is a popular approach for checking properties of large embedded system designs. It is well known that a uniform random choice of test inputs is often suboptimal. Ideally, the choice of inputs has to be guided by choosing the right input distributions in order to expose cornercase violations. However, this is also known to be a hard problem, in practice. In this paper, we present an application of the crossentropy method for adaptively choosing input distributions for falsifying temporal logic properties of hybrid systems. We present various choices for representing input distribution families for the crossentropy method, ranging from a complete partitioning of the input space into cells to a factored distribution of the input using graphical models. Finally, we experimentally compare the falsification approach using the crossentropy method to other stochastic and heuristic optimization techniques implemented inside the tool STaliro over a set of benchmark systems. The performance of the cross entropy method is quite promising. We find that sampling inputs using the crossentropy method guided by trace robustness can discover violations faster, and more consistently than the other competing methods considered.
Robustness of temporal logic specifications
 IN: PROCEEDINGS OF FATES/RV. VOLUME 4262 OF LNCS
, 2006
"... In this paper, we consider the robust interpretation of metric temporal logic (MTL) formulas over timed sequences of states. For systems whose states are equipped with nontrivial metrics, such as continuous, hybrid, or general metric transition systems, robustness is not only natural, but also a cr ..."
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Cited by 11 (6 self)
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In this paper, we consider the robust interpretation of metric temporal logic (MTL) formulas over timed sequences of states. For systems whose states are equipped with nontrivial metrics, such as continuous, hybrid, or general metric transition systems, robustness is not only natural, but also a critical measure of system performance. In this paper, we define robust, multivalued semantics for MTL formulas, which capture not only the usual Boolean satisfiability of the formula, but also topological information regarding the distance, ε, from unsatisfiability. We prove that any other timed trace which remains εclose to the initial one also satisfies the same MTL specification with the usual Boolean semantics. We derive a computational procedure for determining an underapproximation to the robustness degree ε of the specification with respect to a given finite timed state sequence. Our approach can be used for robust system simulation and testing, as well as form the basis for simulationbased verification.
Abstract Modeling and Simulation Aided Verification of Analog/MixedSignal Circuits
, 2008
"... Abstract. Analog/Mixedsignal (AMS) circuit verification is a growing problem as process variation increases and AMS circuits become more functionally complex. To improve analog verification flows, AMS circuit models are needed at different levels of abstraction. This paper discusses recent work and ..."
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Cited by 6 (0 self)
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Abstract. Analog/Mixedsignal (AMS) circuit verification is a growing problem as process variation increases and AMS circuits become more functionally complex. To improve analog verification flows, AMS circuit models are needed at different levels of abstraction. This paper discusses recent work and future directions for abstract model generation and simulation aided verification of AMS circuits. In particular, a CMOS ring oscillator with feedforward inverters is used as a motivating example for the work. This example highlights progress and future directions in AMS modeling and verification. 1