This paper proposes a new signaling method for efficient scan design based on the dual use of on-chip power lines. The proposed signaling scheme intends to increase the channel capacity for the multiple parallel scan design, and we suggest adoption of the UWB (Ultra Wideband) and direct sequence- code division multiple access (DS-CDMA) communication technologies. Because of the wide bandwidth, a UWB signal can reduce its average power level practically to the noise level. The DS-CDMA further mitigates the noise and allows multiple scan inputs to share the inter-connected power lines. We studied the feasibility of the proposed scheme through SPICE simulations and present the simulation results for a power distribution networks consisting of two metal layers. 1.

Abstract — A 900MHz bandwidth front-end with a-100dB/decade roll-off for a baseband pulse-based BPSK ultra-wideband transceiver is designed and tested in 1.8V 0.18µm CMOS. Trade-offs in noise figure (NF) and voltage gain within broadband power-matched and un-matched (voltage-boosted) conditions of the front-end are discussed. The front-end achieves 38dB of gain and 10.2dB of average NF in the power-matched case, and 42dB of gain and 7.9dB of average NF in the un-matched case. Theory and measurements of the matching techniques and microwave design parameters upon NF and UWB signal to sinusoidal interferer ratios will also be presented. Index Terms — Ultra-wideband (UWB) radio, RF frontend, LNA, phase-splitter, NF, SIR, transmission lines, powermatch, un-match, voltage-boost.

Abstract—A comprehensive study of ultrahigh-speed currentmode logic (CML) buffers along with the design of novel regenerative CML latches will be illustrated. First, a new design procedure to systematically design a chain of tapered CML buffers is proposed. Next, two new high-speed regenerative latch circuits capable of operating at ultrahigh-speed datarates will be introduced. Experimental results show a higher performance for the new latch architectures compared to the conventional CML latch circuit at ultrahigh-frequencies. It is also shown, both through the experiments and by using efficient analytical models, why CML buffers are better than CMOS inverters in high-speed low-voltage applications. Index Terms—Broad-band circuits, current mode logic, device mismatch, enviromental noise, tapered buffers, ultrahigh-speed CMOS circuits. I.

This paper presents a 2 GHz image rejection (IR) downconverter implemented in a 0.65 m CMOS technology. It maintains high IR ratio against the process and temperature variations if the on-chip passive RC components are relatively matched. The experimental circuit provides an IR ratio of 40.8 dB without any off-chip filtering or tuning, and dissipates 91 mW at 3.3 V.

In wireless sensor networks due to the small transmission distances involved, the computation energy along with the radio energy determines the battery life. Energy consumption of error control codes (ECCs) is a complex function of the energy consumption in computing encoding-decoding, transmitting “redundant ” bits and energy saved by coding gain. This paper presents a methodology, which integrates computation and radio energy for searching an energy optimal ECC. Based on this methodology, a design space exploration framework and the energy model of sensor node have been developed. Exploration results show that the energy optimal ECC saves 15–58 % node energy for given parameters.

High-performance analog-to-digital converters, digital-to-analog converters, and fractional- frequency synthesizers based on delta--sigma (16) modulation---collectively referred to as data converters---have contributed significantly to the high level of integration seen in recent commercial wireless handset transceivers. This paper presents a tutorial on data converters and their uses and implications with respect to wireless transceiver architectures.

In this paper we present a multiple antenna system for industrial, scientific, and medical (ISM)-band transmission (MASI). The hardware demonstrator was developed and realized at our institute. It enables multiple input multiple output (MIMO)-communication applications and is capable to transmit arbitrary signals using 8 transmit and 8 receive antennas in parallel. It operates in the 2.4 GHz ISMband. The hardware concept is introduced and some design specifications are discussed. As an application example, we will focus on one specific class of transmit diversity schemes: orthogonal space-time block codes (OSTBC). Channel and carrier offset estimation are essential tasks in coherent receivers. However, they are also some kind of error sources due to the imperfectness of the employed algorithm. We will show by simulation and measurement results, that OSTBC based systems are more sensitive to channel estimation errors and/or carrier frequency offsets than conventional single transmit antenna systems. The consequence is that the diversity gain decreases significantly in the case of estimation errors.

voltage and digital power consumption goes down. However due to dynamic range limitations, power supply and power consumption of the RF front-ends and analog sections do not scale in the same fashion. In fact, in scaled systems, the RF section of a wireless transceiver consumes more energy than the digital part. For better understanding of the design trade offs, we first develop an accurate and comprehensive energy model for the analog front-end of wireless transceivers. Next, we evaluate a single user point-to-point wireless data communication system and a multi-user CDMA based system with respect to RF front end energy consumption and communication quality. We demonstrate the effect of occupied signal bandwidth, peak-to-average ratio (PAR), symbol rate, constellation size, and pulseshaping roll-off factor on single user system, and the effect of number of users and multiple access interference (MAI) on CDMA based multi-user system. For a given quality specification, we show how the energy consumption can be reduced by adjusting one or more of these parameters. 1.

Abstract—Despite their use in analog or mixed-signal applications, the high power overheads of traditional linear regulators (both series and shunt) have precluded their successful adoption in regulating the supply of energy-efficient digital circuits. In this paper, we show that linear regulation can in fact reduce the effective supply impedance of digital circuits without increasing their total power dissipation. Achieving this goal requires minimizing the static power dissipation of the regulator, leading to a push-pull topology (similar to the regulators demonstrated by Wu and Sanders, 2001, Poon et al., 1999, and Intersil, 1998) with comparator-based feedback and a switched source-follower output stage. Measured results from a regulator implemented in a 65 nm SOI test-chip verify that by using these techniques, regulation reduces the effective supply noise by 30 % while also enabling a slight decrease (1.4%) in total power dissipation. Index Terms—Digital integrated circuits, power supply distribution, regulators. I.

The test cost of RF systems is an increasing percentage of the overall system cost. This trend is mainly due to the traditional RF testing schemes based on the full measurement of specifications over a wide range of input conditions. In this paper, we present a test development methodology for RF circuits based on a novel parametric fault defition. We target deviations in physical circuit parameters, such as a resistance or the width of a transistor. However, we consider a circuit faulty only if it violates a specification. Our test development method aims at reducing not only the number of measurements, but also the overall test hardware cost by incorporating the relative set-up cost of each measurement into our selection criteria. Experimental results on a low-noise amplifier (LNA) circuit show that our test development technique reduces the overall test time (49 %- 67%) as well as the number of required measurement set-ups (17 %- 33%) considerably. By defining the target faults based on specification violations, our technique also provides high confidence in the test quality. 1.