Results 11 - 20
of
32
Two-Step Incremental Evolution of a Prosthetic Hand Controller Based on Digital Logic Gates
- in ICES2001. 2001
, 2001
"... Evolvable Hardware (EHW) has been proposed as a new method for designing systems for real-world applications. In this paper it is applied for evolving a prosthetic hand controller. It is shown that better generalization performance than neural networks can be obtained. The proposed architecture is b ..."
Abstract
-
Cited by 4 (0 self)
- Add to MetaCart
Evolvable Hardware (EHW) has been proposed as a new method for designing systems for real-world applications. In this paper it is applied for evolving a prosthetic hand controller. It is shown that better generalization performance than neural networks can be obtained. The proposed architecture is based on digital logic gates and its configuration is determined by two separate steps of evolution. 1
Simulation of Evolvable Hardware to Solve Low Level Image Processing Tasks
- In Proc. of the Evolutionary Image Analysis, Signal Processing and Telecommunications Workshop, volume 1596 of Lecture Notes in Computer Science
, 1999
"... . The long term goal of the work described in this paper is the development of a bio-inspired system, employing evolvable hardware, that adapts according to the needs of the environment in whichitisdeployed. The application described here is the design of a novel and highly parallel image proces ..."
Abstract
-
Cited by 3 (0 self)
- Add to MetaCart
. The long term goal of the work described in this paper is the development of a bio-inspired system, employing evolvable hardware, that adapts according to the needs of the environment in whichitisdeployed. The application described here is the design of a novel and highly parallel image processing tool to detect edges within a wide range of conventional grey-scale images. We discuss the simulation of such a system based on a genetic programming paradigm, using a simple binary logic tree to implement the genetic string coding. The results acquired from the simulation are compared with those obtained from the application of a conventional Sobel edge detector, and although rudimentary,show the great potential of such bio-inspired systems. 1 Introduction Bio-inspired systems have been present in the electronics and computer science communities for manyyears [21]. It is possible to classify bio-inspired systems into three domains: phylogeny,ontogenyandepigenesis. Eachofthese i...
Design of Highly Parallel Edge Detection Nodes Using Evolutionary Techniques
, 1999
"... This paper considers the application of bio-inspired systems in the design of a novel and highly parallel image processing tool to detect edges within conventional grey-scale images. The aim of the work is to implement a new image processing architecture through evolvable hardware that is able to ad ..."
Abstract
-
Cited by 3 (2 self)
- Add to MetaCart
This paper considers the application of bio-inspired systems in the design of a novel and highly parallel image processing tool to detect edges within conventional grey-scale images. The aim of the work is to implement a new image processing architecture through evolvable hardware that is able to adapt according to the particular images encountered. The simulation of such a system through the use of evolutionary algorithms and genetic programming is demonstrated for the conventional image processing operation of edge detection. Results are presented for this system and evaluated with respect to a conventional Sobel edge detector. 1. Introduction Bio-inspired systems have been present in the electronics and computer science communities for many years [Von Neumann66]. It is possible to classify bioinspired systems into three domains: phylogeny, ontogeny and epigenesis. Each of these is relatively well understood in the world of natural science. However, inspiration is required to bridg...
An evolvable hardware tutorial
- In Proceedings of the 14th International Conference on Field Programmable Logic and Applications (FPL’2004
, 2004
"... Abstract. Evolvable Hardware (EHW) is a scheme- inspired by natural evolution, for automatic design of hardware systems. By exploring a large design search space, EHW may find solutions for a task, unsolvable, or more optimal than those found using traditional design methods. During evolution it is ..."
Abstract
-
Cited by 3 (1 self)
- Add to MetaCart
Abstract. Evolvable Hardware (EHW) is a scheme- inspired by natural evolution, for automatic design of hardware systems. By exploring a large design search space, EHW may find solutions for a task, unsolvable, or more optimal than those found using traditional design methods. During evolution it is necessary to evaluate a large number of different circuits which is normally most efficiently undertaken in reconfigurable hardware. For digital design, FPGAs (Field Programmable Gate Arrays) are very applicable. Thus, this technology is applied in much of the work with evolvable hardware. The paper introduces EHW and outlines how it can be applied for hardware design of real-world applications. It continues by discussing the main problems and possible solutions. This includes improving the scalability of evolved systems. Promising features of EHW will be addressed as well, including run-time adaptable systems. 1
An Online EHW Pattern Recognition System Applied to Sonar Spectrum Classification
"... Abstract. An evolvable hardware (EHW) system for high-speed sonar return classification has been proposed. The system demonstrates an average accuracy of 91.4 % on a sonar spectrum data set. This is better than a feed-forward neural network and previously proposed EHW architectures. Furthermore, thi ..."
Abstract
-
Cited by 3 (3 self)
- Add to MetaCart
Abstract. An evolvable hardware (EHW) system for high-speed sonar return classification has been proposed. The system demonstrates an average accuracy of 91.4 % on a sonar spectrum data set. This is better than a feed-forward neural network and previously proposed EHW architectures. Furthermore, this system is designed for online evolution. Incremental evolution, data buses and high level modules have been utilized in order to make the evolution of the 480 bit-input classifier feasible. The classification has been implemented for a Xilinx XC2VP30 FPGA with a resource utilization of 81 % and a classification time of 0.5µs. 1
Towards Automated Evolutionary Design of Combinational Circuits
, 2001
"... In this paper we propose a methodology based on a genetic algorithm (GA) to automate the design of combinational logic circuits in which we aim to minimize the total number of gates used. Our results are compared against those produced by human designers and by another GA-based approach. We also ana ..."
Abstract
-
Cited by 2 (0 self)
- Add to MetaCart
In this paper we propose a methodology based on a genetic algorithm (GA) to automate the design of combinational logic circuits in which we aim to minimize the total number of gates used. Our results are compared against those produced by human designers and by another GA-based approach. We also analyze the importance of using a non-binary representation in this problem despite the commonly accepted notion of universality of the binary representation in all kinds of GA-based applications. Keywords: circuit design, optimization, genetic algorithms, computeraided design, artificial intelligence. 1 Introduction Design is a task that requires knowledge and creativity which are two human attributes normally considered too complex to be automated. Researchers in Artificial Intelligence (AI) have devoted a lot of work towards automating different aspects of design, but most of the current results 1 consist of complex and expensive programs that can be easily outperformed by experienced h...
Rapid evolution of time-efficient packet classifiers
- In Proceedings of the 2006 IEEE Congress on Evolutionary Computation. IEEE CIS
, 2006
"... Abstract — Communication networks today are facing an ever increasing network traffic as well as raising quality-of-service agreements, which together demand for high performance network routers. Since a router has to search a large set or routing rules for every incoming packet, it normally utilize ..."
Abstract
-
Cited by 2 (0 self)
- Add to MetaCart
Abstract — Communication networks today are facing an ever increasing network traffic as well as raising quality-of-service agreements, which together demand for high performance network routers. Since a router has to search a large set or routing rules for every incoming packet, it normally utilizes efficient search mechanisms, such as trees or hash tables. This paper evolves hash functions directly in hardware and also discusses an improved initialization process. On a benchmark test consisting of 65,536 routing rules, the final hash functions consume an average of about 1.3 memory accesses per incoming data packet. I.
SUSTAINABLE EVOLUTIONARY ALGORITHMS AND SCALABLE EVOLUTIONARY SYNTHESIS OF DYNAMIC SYSTEMS
, 2004
"... This dissertation concerns the principles and techniques for scalable evolutionary computation to achieve better solutions for larger problems with more computational resources. It suggests that many of the limitations of existent evolutionary algorithms, such as premature convergence, stagnation, l ..."
Abstract
-
Cited by 2 (0 self)
- Add to MetaCart
This dissertation concerns the principles and techniques for scalable evolutionary computation to achieve better solutions for larger problems with more computational resources. It suggests that many of the limitations of existent evolutionary algorithms, such as premature convergence, stagnation, loss of diversity, lack of reliability and efficiency, are derived from the fundamental convergent evolution model, the oversimplified “survival of the fittest” Darwinian evolution model. Within this model, the higher the fitness the population achieves, the more the search capability is lost. This is also the case for many other conventional search techniques. The main result of this dissertation is the introduction of a novel sustainable evolution model, the Hierarchical Fair Competition (HFC) model, and corresponding five sustainable evolutionary algorithms (EA) for evolutionary search. By maintaining individuals in hierarchically organized fitness levels and keeping evolution going at all fitness levels, HFC transforms the conventional convergent evolutionary computation model into a sustainable search framework by ensuring a continuous supply and incorporation of low-level building blocks and by culturing and maintaining building blocks of intermediate levels with its
A comprehensive overview of the applications of artificial life
- ARTIFICIAL LIFE
, 2006
"... We review the applications of artificial life (ALife), the creation of synthetic life on computers to study, simulate, and understand living systems. The definition and features of ALife are shown by application studies. ALife application fields treated include robot control, robot manufacturing, p ..."
Abstract
-
Cited by 2 (0 self)
- Add to MetaCart
We review the applications of artificial life (ALife), the creation of synthetic life on computers to study, simulate, and understand living systems. The definition and features of ALife are shown by application studies. ALife application fields treated include robot control, robot manufacturing, practical robots, computer graphics, natural phenomenon modeling, entertainment, games, music, economics, Internet, information processing, industrial design, simulation software, electronics, security, data mining, and telecommunications. In order to show the status of ALife application research, this review primarily features a survey of about 180 ALife application articles rather than a selected representation of a few articles. Evolutionary computation is the most popular method for designing such applications, but recently swarm intelligence, artificial immune network, and agent-based modeling have also produced results. Applications were initially restricted to the robotics
A Hardware/Software Co-design Approach for Face Recognition by . . .
- IN 16TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS
, 2004
"... ..."

