s: Jan. 1992 -- Dec. 1994 ffl CTI: Current Technology Index Jan./Feb. 1993 -- Jan./Feb. 1994 ffl DAI: Dissertation Abstracts International: Vol. 53 No. 1 -- Vol. 55 No. 4 (1994) ffl EEA: Electrical & Electronics Abstracts: Jan. 1991 -- Dec. 1994 ffl P: Index to Scientific & Technical Proceedings: Jan. 1986 -- Feb. 1995 (except Nov. 1994) ffl EI A: The Engineering Index Annual: 1987 -- 1992 ffl EI M: The Engineering Index Monthly: Jan. 1993 -- Dec. 1994 The following GA researchers have already kindly supplied their complete autobibliographies and/or proofread references to their papers: Dan Adler, Patrick Argos, Jarmo T. Alander, James E. Baker, Wolfgang Banzhaf, Ralf Bruns, I. L. Bukatova, Thomas Back, Yuval Davidor, Dipankar Dasgupta, Marco Dorigo, Bogdan Filipic, Terence C. Fogarty, David B. Fogel, Toshio Fukuda, Hugo de Garis, Robert C. Glen, David E. Goldberg, Martina Gorges-Schleuter, Jeffrey Horn, Aristides T. Hatjimihail, Mark J. Jakiela, Richard S. Judson, Akihiko Konaga...

. Evolvable Hardware (EHW) has been proposed as a new method for designing systems for complex real world applications. One of the problems has been that only small systems have been evolvable. This paper indicates some of the aspects in biological systems that are important for evolving complex systems. Further, a divide-and-conquer scheme is proposed, where a system is evolved by evolving smaller subsystems. Experiments show that the number of generations required for evolution by the new method can be substantially reduced compared to evolving a system directly. However, there is no lack of performance in the final system. 1 Introduction Evolvable hardware (EHW) has been introduced as a target architecture for complex system design based on evolution. So far a very limited number of real applications have been proved to be solvable by this new scheme. There are several reasons for this. One is the problem of evolving systems based on a long chromosome string. The problem has been t...

Our experiences with a range of evolutionary robotic experiments have resulted in major changes to our set-up of artificial life experiments and our interpretation of observed phenomena. Initially, we investigated simulation-reality relationships in order to transfer our artificial life simulation work with evolution of neural network agents to real robots. This is a difficult task, but can, in a lot of cases, be solved with a carefully built simulator. By being able to evolve control mechanisms for physical robots, we were able to study biological hypotheses about animal behaviours by using exactly the same experimental set-ups as were used in the animal behavioural experiments. Evolutionary robotic experiments with rats open field box experiments and chick detours show how evolutionary robotics can be a powerful biological tool, and they also suggest that incremental learning might be fruitful for achieving complex robot behaviour in an evolutionary context. However, it is not enough...

The paper introduces a new method for the design of realworld applications of evolvable hardware using common FPGAs (Field Programmable Gate Arrays). In order to avoid “reconfiguration problems” of current FPGAs a new virtual reconfigurable circuit, whose granularity and configuration schema exactly fit to requirements of a given application, is designed on the top of an ordinary FPGA. As an example, a virtual reconfigurable circuit is constructed to speed up the software model, which was utilized for the evolutionary design of image operators.

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Evolvable Hardware (EHW) has been proposed as a new method for designing systems for real-world applications. This paper contains a classification of the published work on this topic. Further, a thorough discussion about the limitations of the present EHW and possible solutions to these are proposed. EHW has been applied to a wide range of applications. However, to solve more complex applications, the evolutionary schemes should be improved.

Abstract. An automatic traffic sign detection system would be important in a driver assistance system. In this paper, an approach for detecting numbers on speed limit signs is proposed. Such a system would have to provide a high recognition performance in real-time. Thus, in this paper we propose to apply evolvable hardware for the classification of the numbers extracted from images. The system is based on incremental evolution of digital logic gates. Experiments show that this is a very efficient approach. 1

ential design tools, while the later emphasizes adaptation of hardware. It is worth pointing out that EHW is quite di erent from the hardware implementation of evolutionary algorithms, where hardware is used to speed up various evolutionary operations. The hardware itself does not change or adapt. There are two major aspects to EHW: simulated evolution and electronic hardware. The simulated evolution can be driven by genetic algorithms (GAs), genetic programming (GP), evolutionary programming (EP), or evolution strategies (ESs). There is no uniform answer as to which type of evolutionary algorithm would be the best for EHW. Di erent evolutionary algorithms would suit di erent EHW. The electronic hardware used in EHW can be digital, analogue or hybrid circuits. One of the advantages of evolutionary algorithms is that they impose very few constraints on the type of circuits used in EHW. Most EHW relies heavily on recon gurable hardware, such as eld programmable gate arrays (FPGAs). Th

The introduction of a genotype-phenotype map modelled on biological development can potentially improve the scalability of evolutionary algorithms. Previous work by Gordon and Bentley demonstrated that such a model can be used to evolve patterns that map to useful but small phenotypes. This paper uses the same model to generate much larger patterns covering arrays of up to 64x64 cells. The results show that the model’s performance is generally comparable to similar development-based systems [12, 14], and with some measures outperforms them. Additionally the inherent biases of the model are explored, such as the need to use symmetry-breaking initial conditions which some other models do not require. This exploration yields a set of guidelines that suggest what kinds of problem the model is suited to exploring.

Abstract Evolutionary approaches have been used in a large variety of design domains, from aircraft engineering to the designs of analog filters. Many of these approaches use measures to improve the variety of solutions in the population. One such measure is clustering. In this paper, clustering and Pareto optimisation are combined into a single evolutionary design algorithm. The population is split into a number of clusters, and parent and offspring selection, as well as fitness calculation, are performed on a per-cluster basis. The objective of this is to prevent the system from converging prematurely to a local minimum and to encourage a number of different designs that fulfil the design criteria. Our approach is demonstrated in the domain of digital filter design. Using a polar coordinate based pole-zero representation, two different lowpass filter design problems are explored. The results are compared to designs created by a human expert. They demonstrate that the evolutionary process is able to create designs that are competitive with those created using a conventional design process by a human expert. They also demonstrate that each evolutionary run can produce a number of different designs with similar fitness values, but very different characteristics. 1