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Experiences of building an ATM switch for the Local Area
 In Proceedings ACM SIGCOMM
, 1994
"... The Fairisle project was concerned with ATM in the local area. An earlier paper [9] described the preliminary work and plans for the project. Here we present the experiences we have had with the Fairisle network, describing how implementation has changed over the life of the project, the lessons lea ..."
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Cited by 17 (9 self)
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The Fairisle project was concerned with ATM in the local area. An earlier paper [9] described the preliminary work and plans for the project. Here we present the experiences we have had with the Fairisle network, describing how implementation has changed over the life of the project, the lessons learned, and some conclusions about the work so far. 1 Introduction The Fairisle project was a three year effort at the Computer Laboratory begun in October 1989, to design and build an ATM local area network, and to investigate the architecture and management algorithms appropriate to the local area. The project included the construction of ATM switches, host interfaces, device drivers, and management software. Within the Computer Laboratory, other research projects such as multimedia, operating systems, workstation architecture and distributed systems are now using the bandwidth provided by the Fairisle network, and providing the network with real data. This paper presents a report of the...
Tracking Design Changes with Formal Verification
 International Workshop on Higher Order Logic Theorem Proving and its Applications, volume 859 of Lecture Notes in Computer Science
, 1994
"... . Designs are often modified for use in new circumstances. If formal proof is to be an acceptable verification methodology for industry, it must be capable of tracking design changes quickly. We describe our experiences formally verifying an implementation of an ATM network component, and on our sub ..."
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Cited by 4 (2 self)
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. Designs are often modified for use in new circumstances. If formal proof is to be an acceptable verification methodology for industry, it must be capable of tracking design changes quickly. We describe our experiences formally verifying an implementation of an ATM network component, and on our subsequent verification of modified designs. Three of the designs verified are in use in a working network. They were designed and implemented with no consideration for formal methods. This case study gives an indication of the difficulties in formally verifying a real design and of subsequently tracking design changes. 1 Introduction Designs are often modified as requirements change. Such modifications often take a fraction of the original design time to complete. Even if a design can initially be validated in an acceptable time scale, formal verification is unlikely to be accepted if a similar amount of time is required to validate subsequent modified designs. It has been suggested that this...
Problems Encountered in the Machineassisted Proof of Hardware
 Higher Order Logic Theorem Proving and Its Applications, Lecture Notes in Computer Science 780
, 1994
"... . We describe our experiences verifying real communications hardware using machineassisted proof. In particular we reflect on the errors found, problems encountered and the bottlenecks that slowed the progress of the proofs. We also note techniques which would alleviate the problems. Most of the pr ..."
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Cited by 3 (0 self)
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. We describe our experiences verifying real communications hardware using machineassisted proof. In particular we reflect on the errors found, problems encountered and the bottlenecks that slowed the progress of the proofs. We also note techniques which would alleviate the problems. Most of the problems we discuss only become significant when large designs are verified. 1 Introduction Descriptions of formal verification projects invariably focus on the successes. However, much can also be learned from the things that slow progress. In this paper we reflect on the problems encountered in the verification of real communications hardware: the Fairisle Asynchronous Transfer Mode (ATM) switching fabrics [7]. Fairisle is an existing network, designed by the Systems Research Group in Cambridge. It was designed as a platform for research into multimedia and management issues of ATM networks, and carries real user data. The switching fabrics that we considered contain both control and data p...
Specifications of the ATM Switch Fabric in Coq
, 1997
"... this report, we consider digital circuits. Describing circuits as mathematical objects corresponds to construct accurate formal specifications of these circuits on which it becomes possible to prove correctness properties. From this point of view, formal verification of circuits amounts to develop a ..."
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this report, we consider digital circuits. Describing circuits as mathematical objects corresponds to construct accurate formal specifications of these circuits on which it becomes possible to prove correctness properties. From this point of view, formal verification of circuits amounts to develop a proof which states that the representation of the circuit under consideration (structural specification) satisfies the representation of its intended behaviour (behavioural specification) that is to say what one expects from the circuit to be correct. In other words, establishing the correctness of a circuit is proving that its implementation is equivalent (or at least implies) its specification.
doi:10.1155/2009/548324 Research Article A Formal Approach to the Verification of Networks on Chip
, 2009
"... The current technology allows the integration on a single die of complex systemsonchip (SoCs) that are composed of manufactured blocks (IPs), interconnected through specialized networks on chip (NoCs). IPs have usually been validated by diverse techniques (simulation, test, formal verification) an ..."
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The current technology allows the integration on a single die of complex systemsonchip (SoCs) that are composed of manufactured blocks (IPs), interconnected through specialized networks on chip (NoCs). IPs have usually been validated by diverse techniques (simulation, test, formal verification) and the key problem remains the validation of the communication infrastructure. This paper addresses the formal verification of NoCs by means of a mechanized proof tool, the ACL2 theorem prover. A metamodel for NoCs has been developed and implemented in ACL2. This metamodel satisfies a generic correctness statement. Its verification for a particular NoC instance is reduced to discharging a set of proof obligations for each one of the NoC constituents. The methodology is demonstrated on a realistic and stateoftheart design, the Spidergon network from STMicroelectronics. Copyright © 2009 Dominique Borrione et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. 1.