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Classification and generation of schedules for VLIW processors. Concurrency and Computation: Practice and Experience (2007)

by C Kessler, A Bednarski, M Eriksson
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c○ACM. Integrated Code Generation for Loops

by Mattias Eriksson, Christoph Kessler, Linköping University
"... Code generation in a compiler is commonly divided into several phases: instruction selection, scheduling, register allocation, spill code generation, and, in the case of clustered architectures, cluster assignment. These phases are interdependent; for instance, a decision in the instruction selectio ..."
Abstract - Cited by 5 (1 self) - Add to MetaCart
Code generation in a compiler is commonly divided into several phases: instruction selection, scheduling, register allocation, spill code generation, and, in the case of clustered architectures, cluster assignment. These phases are interdependent; for instance, a decision in the instruction selection phase affects how an operation can be scheduled. We examine the effect of this separation of phases on the quality of the generated code. To study this we have formulated optimal methods for code generation with integer linear programming; first for acyclic code and then we extend this method to modulo scheduling of loops. In our experiments we compare optimal modulo scheduling, where all phases are integrated, to modulo scheduling, where instruction selection and cluster assignment are done in a separate phase. The results show that, for an architecture with two clusters, the integrated method finds a better solution than the non-integrated method for 27 % of the instances.
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...banks with the set RS. The binary parameter Up,f,o is 1 iff the instruction with pattern p ∈ P uses the resource f ∈ F at time step o relative to the issue time. Note that this allows for multiblock [=-=Kessler et al. 2007-=-] and irregular reservation tables [Rau ACM Trans. Embed. Comput. Syst., Vol. 11S, No. 1, Art. 19, June 2012.4 · M. Eriksson and C. Kessler Register file A (A0−A15) Register file B (B0−B15) X1 X2 .L1...

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