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Unifying BitWidth Optimisation for FixedPoint and FloatingPoint Designs
 In 12th Annual IEEE Symposium on FieldProgrammable Custom Computing Machines (FCCM04
, 2004
"... This paper presents a method that offers a uniform treatment for bitwidth optimisation of both fixedpoint and floatingpoint designs. Our work utilises automatic differentiation to compute the sensitivities of outputs to the bitwidth of the various operands in the design. This sensitivity analysis ..."
Abstract

Cited by 23 (9 self)
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This paper presents a method that offers a uniform treatment for bitwidth optimisation of both fixedpoint and floatingpoint designs. Our work utilises automatic differentiation to compute the sensitivities of outputs to the bitwidth of the various operands in the design. This sensitivity analysis enables us to explore and compare fixedpoint and floatingpoint implementation for a particular design. As a result we can automate the selection of the optimal number representation for each variable in a design to optimize area and performance. We implement our method in the BitSize tool targeting reconfigurable architectures, which takes userdefined constraints to direct the optimisation procedure. We illustrate our approach using applications such as raytracing and function approximation. 1
a Discrete Fourier Transform implementation and
"... Automatic bitwidth analysis is a key ingredient for highlevel programming of FPGAs and highlevel synthesis of VLSI circuits. The objective is to find the minimal number of bits to represent a value in order to minimize the circuit area and to improve efficiency of the respective arithmetic operatio ..."
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Automatic bitwidth analysis is a key ingredient for highlevel programming of FPGAs and highlevel synthesis of VLSI circuits. The objective is to find the minimal number of bits to represent a value in order to minimize the circuit area and to improve efficiency of the respective arithmetic operations, while satisfying userdefined numerical constraints. We present a novel approach to bitwidth – or precision – analysis for floatingpoint designs. The approach involves analysing the dataflow graph representation of a design to see how sensitive the output of a node is to changes in the outputs of other nodes: higher sensitivity requires higher precision and hence more output bits. We automate such sensitivity analysis by a mathematical method called automatic differentiation, which involves differentiating variables in a design with respect to other variables. We illustrate our approach by optimising the bitwidth for two examples,