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Generalized ReedMuller Canonical Form for a MultipleValued Algebra
 MultipleValued Logic, An International Journal
, 1996
"... A multiplevalued algebra which is functionally complete with constants is considered. It is based on the operations of addition modulo m, minimum, and the set of all literal operators, where m is a positive integer. A decomposition, allowing a function of n variables to be expressed through n funct ..."
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A multiplevalued algebra which is functionally complete with constants is considered. It is based on the operations of addition modulo m, minimum, and the set of all literal operators, where m is a positive integer. A decomposition, allowing a function of n variables to be expressed through n functions of n \Gamma 1 variables, is developed. Using this decomposition, a generalization of fixed polarity ReedMuller canonical form for the multiplevalued algebra under consideration is derived. An algorithm for computing the coefficients of such a canonical form, based on matrix multiplication, is given. Advantages of the introduced canonical form over other generalizations of the ReedMuller canonical form previously proposed, are discussed. Key words: multiplevalued algebra, canonical form, fixed polarity, ReedMuller form 1 Introduction In 1954 Reed [7] and Muller [4] observed that any Boolean function can be expressed as an expansion using AND and XOR operations. Their work leads to ...
Evaluation of Toggle Coverage for MVL Circuits Specified in the
"... Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such systems. Recently, a new language, SystemVerilog, was introduced and became an IEEE standard. SystemVerilog extends the hardw ..."
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Cited by 3 (1 self)
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Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such systems. Recently, a new language, SystemVerilog, was introduced and became an IEEE standard. SystemVerilog extends the hardware description language Verilog by including higher abstraction levels and integrated verification features. In this paper, we first present the concept of modeling multiple valued logic circuits in SystemVerilog. We demonstrate that this approach allows for efficient simulation of complex multiple valued logic systems. Secondly, we show how SystemVerilog can be used to ensure functional correctness. A generalization of binary toggle coverage for the multiple valued logic domain is presented and evaluated. As a test case, a scalable multiple valued logic arithmetic unit is modeled and experimental results for multiple valued logic toggle coverage are given. 1.
Representation of MultipleValued Functions with Modp Decision Diagrams
 In Proceedings of IEEE/ACM International Workshop on Logic Synthesis (IWLS2000), Dana Point
, 2000
"... Multiplevalued logic allows us to formulate problems by using symbolic variables which are often more naturally associated with the problem speci cation than the variables obtained by a binary encoding. In this paper we present a data structure for representation and manipulation of multiplevalued ..."
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Cited by 2 (0 self)
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Multiplevalued logic allows us to formulate problems by using symbolic variables which are often more naturally associated with the problem speci cation than the variables obtained by a binary encoding. In this paper we present a data structure for representation and manipulation of multiplevalued functions  Modp Decision Diagrams (ModpDDs). ModpDDs differ from conventional MultipleValued Decision Diagrams (MDDs) in that they contain not only branching nodes but also functional nodes, labeled by addition modulo p operation, p  prime. ModpDDs are potentially much more spaceecient than MDDs. However, they are not a canonical representation and thus, the equivalence test of two ModpDDs is more difficult then the test of two MDDs. To overcome this problem, we design a fast probabilistic equivalence test for ModpDDs that requires time linear in the number of nodes.
NonSilicon NonBinary Computing: Why not?
"... Nonsilicon based computing technologies open new possibilities for designing electronic circuits which employ more than two discrete levels of signal. Such circuits, called multiplevalued logic circuits, have a number of theoretical advantages over standard binary circuits. In this paper, we give ..."
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Nonsilicon based computing technologies open new possibilities for designing electronic circuits which employ more than two discrete levels of signal. Such circuits, called multiplevalued logic circuits, have a number of theoretical advantages over standard binary circuits. In this paper, we give an introduction to alternative to binary number representations and multiplevalued logic. We discuss possibilities for implementing multiplevalued functions using chemically assembled electronic nanotechnology.
Modeling MultiValued Circuits in SystemC
"... The complexity of todays hardware systems steadily increases. Due to this fact new ways of efficiently describing systems are investigated. A very promising approach in this area is SystemC which is a C++library. To take advantage of SystemC in the multivalued domain, the concept of multivalued l ..."
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The complexity of todays hardware systems steadily increases. Due to this fact new ways of efficiently describing systems are investigated. A very promising approach in this area is SystemC which is a C++library. To take advantage of SystemC in the multivalued domain, the concept of multivalued logic has to be embedded in SystemC.
Modp Decision Diagrams: A Data Structure for MultipleValued Functions
, 1999
"... Multiplevalued decision diagrams (MDDs) give a way of approaching problems by using symbolic variables which are often more naturally associated with the problem statement than the variables obtained by a binary encoding. Several types of MDDs, employing different multiplevalued decompositions hav ..."
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Cited by 1 (0 self)
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Multiplevalued decision diagrams (MDDs) give a way of approaching problems by using symbolic variables which are often more naturally associated with the problem statement than the variables obtained by a binary encoding. Several types of MDDs, employing different multiplevalued decompositions have been already introduced. We present a more general class of multiplevalued decision diargams, containing not only branching nodes but also functional nodes, labeled by addition modulo p operation, p  prime, and give algorithms for their manipulation. Such decision diagrams have a potential of being more spaceefficient than MDDs. However, they are not a canonical representation of multiplevalued functions and thus the equivalence test of two ModpDDs is more difficult then the test of two MDDs. To overcome this problem, we design a fast probabilistic equivalence test for ModpDDs that requires time linear in the number of nodes.
Multivalued Logic Mapping of Neurons in Feedforward Networks
"... A common view of feedforward neural networks is that of a black box since the knowledge embedded in the connection weights of a feedforward neural network is generally considered incomprehensible. Many researchers have addressed this deficiency of neural networks by suggesting schemes to obtain a Bo ..."
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A common view of feedforward neural networks is that of a black box since the knowledge embedded in the connection weights of a feedforward neural network is generally considered incomprehensible. Many researchers have addressed this deficiency of neural networks by suggesting schemes to obtain a Boolean logic representation for the output of a neuron based on its connection weights. However, these schemes mostly assume binary inputs to the neural network. Since it is not uncommon to find multivalued discrete inputs to neurons, we present in this paper a weight mapping scheme that is capable of generating a multivalued logic representation for the output of a neuron. Such a logic representation is also useful for continuous inputs through multilevel quantization. Two examples are presented to illustrate the use of multivalued logic representation in understanding the knowledge incorporated in the connection strengths of neurons in feedforward networks.
Error Diagnosis in Sequential MultiValued Logic Networks
"... In this paper we present a model for diagnosis of errors in Sequential MultiValued Logic Networks (SMVLN). The method allows not only to detect errors in an implementation, but also identifies the fault location. In contrast to many previously presented approaches this model does not consider a spe ..."
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In this paper we present a model for diagnosis of errors in Sequential MultiValued Logic Networks (SMVLN). The method allows not only to detect errors in an implementation, but also identifies the fault location. In contrast to many previously presented approaches this model does not consider a specific implementation. Instead the model assumes tests based on the transition behavior of the corresponding MVL Finite State Machine (FSM) on the functional level. We present a method for constructing a minimal cost test based on AND/OR graphs using tests with MV outcomes. The model enables encoding over twovalued circuits as well as consideration of SMVLNs. The new approach provides efficient solution even for large MVL FSMs with up to 50000 states. Experimental results for randomly generated FSMs are given that demonstrate the efficiency of our approach. 1 Introduction Several circuit design methods for MultiValued Logic (MVL) have been proposed in the past few years [3, 6]. These new ...
A Note on Symbolic Simulation using Decision Diagrams
"... If Decision Diagrams (DDs) are used for the representation of the logical behavior of a combinational logic circuit it has to be traversed in topological order. At each gate the corresponding synthesis operation is carried out. This traversal process is called symbolic simulation. ..."
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If Decision Diagrams (DDs) are used for the representation of the logical behavior of a combinational logic circuit it has to be traversed in topological order. At each gate the corresponding synthesis operation is carried out. This traversal process is called symbolic simulation.
Minimization of MultipleValued Functions in Post Algebra
 In Int'l Workshop on Logic Synth
, 2001
"... The relation between minimum sumofproducts expressions for multiplevalued input, binaryvalued output functions and minimum sumofproducts expressions in Post algebra for multiplevalued input, multiplevalued output functions is made precise. We give an algorithm for minimizing Post expressions ..."
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The relation between minimum sumofproducts expressions for multiplevalued input, binaryvalued output functions and minimum sumofproducts expressions in Post algebra for multiplevalued input, multiplevalued output functions is made precise. We give an algorithm for minimizing Post expressions and discuss a method for their factorization. Experiments are given to demonstrate the effectiveness of the algorithm. 1