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Compiler-directed dynamic voltage and frequency scaling for CPU power and energy reduction (2003)

by C-H Hsu
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Profile-based dynamic voltage scheduling using program checkpoints

by Ana Azevedo, Ilya Issenin, Radu Cornea, Rajesh Gupta, Nikil Dutt, Alex Veidenbaum, Alex Nicolau - In Proceedings of Design, Automation and Test in Europe Conference , 2002
"... Dynamic voltage scaling (DVS) is a known effective mechanism for reducing CPU energy consumption without significant performance degradation. While a lot of work has been done on inter-task scheduling algorithms to implement DVS under operating system control, new research challenges exist in intra- ..."
Abstract - Cited by 50 (2 self) - Add to MetaCart
Dynamic voltage scaling (DVS) is a known effective mechanism for reducing CPU energy consumption without significant performance degradation. While a lot of work has been done on inter-task scheduling algorithms to implement DVS under operating system control, new research challenges exist in intra-task DVS techniques under software and compiler control. In this paper we introduce a novel intra-task DVS technique under compiler control using program checkpoints. Checkpoints are generated at compile time and indicate places in the code where the processor speed and voltage should be re-calculated. Checkpoints also carry user-defined time constraints. Our technique handles multiple intra-task performance deadlines and modulates power consumption according to a run-time power budget. We experimented with two heuristics for adjusting the clock frequency and voltage. For the particular benchmark studied, one heuristic yielded 63 % more energy savings than the other. With the best of the heuristics we designed, our technique resulted in 82 % energy savings over the execution of the program without employing DVS. 1 1.

Effective dynamic voltage scaling through CPU-boundedness detection

by Chung-hsing Hsu, Wu-chun Feng - In Workshop on Power Aware Computing Systems , 2004
"... Abstract. Dynamic voltage scaling (DVS) allows a program to execute at a non-peak CPU frequency in order to reduce CPU power, and hence, energy consumption; however, it is oftentimes done at the expense of performance degradation. For a program whose execution time is bounded by peripherals ’ perfor ..."
Abstract - Cited by 10 (1 self) - Add to MetaCart
Abstract. Dynamic voltage scaling (DVS) allows a program to execute at a non-peak CPU frequency in order to reduce CPU power, and hence, energy consumption; however, it is oftentimes done at the expense of performance degradation. For a program whose execution time is bounded by peripherals ’ performance rather than the CPU speed, applying DVS to the program will result in negligible performance penalty. Unfortunately, existing DVS-based power-management algorithms are conservative in the sense that they overly exaggerate the impact that the CPU speed has on the execution time. We propose a new DVS algorithm that detects the CPU-boundedness of a program on the fly (via a regression method on the past MIPS rate) and then adjusts the CPU frequency accordingly. To illustrate its effectiveness, we compare our algorithm with other DVS algorithms on real systems via physical measurements. 1

Dynamic Voltage and Frequency Scaling for Scientific Applications

by Chung-hsing Hsu, Ulrich Kremer - In Proceedings of the 14th annual workshop on Languages and Compilers for Parallel Computing , 2001
"... This paper discusses the benefit of dynamic voltage and frequency scaling for scientific applications under different optimization levels. The reported experiments... ..."
Abstract - Cited by 9 (3 self) - Add to MetaCart
This paper discusses the benefit of dynamic voltage and frequency scaling for scientific applications under different optimization levels. The reported experiments...
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